25LC1024-I/P Microchip Technology, 25LC1024-I/P Datasheet - Page 16

no-image

25LC1024-I/P

Manufacturer Part Number
25LC1024-I/P
Description
IC EEPROM 1MBIT 20MHZ 8DIP
Manufacturer
Microchip Technology
Datasheet

Specifications of 25LC1024-I/P

Memory Size
1M (128K x 8)
Package / Case
8-DIP (0.300", 7.62mm)
Operating Temperature
-40°C ~ 85°C
Format - Memory
EEPROMs - Serial
Memory Type
EEPROM
Speed
20MHz
Interface
SPI, 3-Wire Serial
Voltage - Supply
2.5 V ~ 5.5 V
Organization
128 K x 8
Interface Type
SPI
Maximum Clock Frequency
20 MHz
Access Time
50 ns
Supply Voltage (max)
5.5 V
Supply Voltage (min)
2.5 V
Maximum Operating Current
10 mA
Maximum Operating Temperature
+ 85 C
Mounting Style
Through Hole
Minimum Operating Temperature
- 40 C
Operating Supply Voltage
2.5 V, 5.5 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
25LC1024-I/P
Manufacturer:
MCP
Quantity:
1 136
Part Number:
25LC1024-I/P
Manufacturer:
MICROCHIP
Quantity:
12 000
Part Number:
25LC1024-I/P
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
25LC1024
2.10
The Chip Erase function will erase all bits (FFh) in the
array. A Write Enable (WREN) instruction must be given
prior to executing a Chip Erase. This is done by setting
CS low and then clocking out the proper instruction
into the 25LC1024. After all eight bits of the instruction
are transmitted, the CS must be brought high to set
the write enable latch.
The Chip Erase function is entered by driving the CS
low, followed by the instruction code (Figure 2-10)
onto the SI line.
FIGURE 2-10:
DS22064D-page 16
CHIP ERASE
CHIP ERASE SEQUENCE
SCK
CS
SO
SI
1
0
1
1
High-Impedance
0
2
0
3
The CS pin must be driven high after the eighth bit of
the instruction code has been given or the Chip Erase
function will not be executed. Once the CS pin is
driven high, the self-timed Chip Erase function begins.
While the device is executing the Chip Erase function
the WIP bit in the STATUS register can be read to
determine when the Chip Erase function is complete.
The Chip Erase function is ignored if either of the
Block Protect bits (BP0, BP1) are not 0, meaning ¼,
½, or all of the array is protected.
0
4
1
5
1
6
1
7
 2010 Microchip Technology Inc.

Related parts for 25LC1024-I/P