E909.05A61DC ELMOS Semiconductor, E909.05A61DC Datasheet - Page 16

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E909.05A61DC

Manufacturer Part Number
E909.05A61DC
Description
Processors - Application Specialized Halios multipurpose sensor IC
Manufacturer
ELMOS Semiconductor
Datasheet

Specifications of E909.05A61DC

Rohs
yes
Processor Series
EL16
Data Bus Width
16 bit
Maximum Clock Frequency
8 MHz
Data Ram Size
3 kB
Operating Supply Voltage
2.25 V to 2.75 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Package / Case
QFN-32
Interface Type
I2C, SPI
Memory Type
Flash, SRAM
Minimum Operating Temperature
- 40 C
Number Of Timers
2
PRELIMINARY INFORMATION AUG 02, 2011
The ASIC is equipped with a reset input pin which can be used to reset the chip. Any low pulse longer than
TDEBNRST on the external reset line will be sensed and causes an ASIC reset.
The ASIC contains different dynamic and static reset sources. The static sources trigger the master reset as
long as the cause for the reset persists. The dynamic sources trigger the reset for a defined minimum reset
time. After that time has expired the system reset is released. In case the dynamic source is still signaling a
reset the reset is re-triggered.
Figure 5.4.1-1 Timing of the external reset signal
This document contains information on a pre-production product. ELMOS Semiconductor AG reserves the right to change specifications and information herein without notice.
ELMOS Semiconductor AG
5.4 Reset Generation
5.4.1 Reset Generation (RESGEN)
NRST_PAD in
NRST_DEB
HALIOS® MULTI-PURPOSE OPTICAL SENSOR WITH HIGH LIGHT IMMUNITY
Static reset sources:
Dynamic reset sources:
A power up sequence of the core voltage (power on reset)
Brown out of the core voltage
SRAM parity error
CPU register parity error
watchdog time out
Filtered by debouncer
TDEB_NRST
Data Sheet 16 / 67
QM-No.: 25DS0014E.00
t
E909.05

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