E909.05A61DC ELMOS Semiconductor, E909.05A61DC Datasheet - Page 25

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E909.05A61DC

Manufacturer Part Number
E909.05A61DC
Description
Processors - Application Specialized Halios multipurpose sensor IC
Manufacturer
ELMOS Semiconductor
Datasheet

Specifications of E909.05A61DC

Rohs
yes
Processor Series
EL16
Data Bus Width
16 bit
Maximum Clock Frequency
8 MHz
Data Ram Size
3 kB
Operating Supply Voltage
2.25 V to 2.75 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Package / Case
QFN-32
Interface Type
I2C, SPI
Memory Type
Flash, SRAM
Minimum Operating Temperature
- 40 C
Number Of Timers
2
PRELIMINARY INFORMATION AUG 02, 2011
Table 6.3.4.1: Constant Generation Register CG1/CG2 Table
The assembler uses the constant generator automatically if one of the six constants is used as an immediate
source operand. Registers R2 and R3, used in the constant mode, cannot be addressed explicitly; they act as
source-only registers.
registers, address pointers, or index values and can be accessed with byte or word instructions.
Seven addressing modes for the source operand and four addressing modes for the destination operand can
address the complete address space with no exceptions. The bit numbers in the table below describe the
contents of the As(source) and Ad (destination) mode bits.
This document contains information on a pre-production product. ELMOS Semiconductor AG reserves the right to change specifications and information herein without notice.
ELMOS Semiconductor AG
Register
The constant generator advantages are:
6.3.5 General-Purpose Register R4 - R15
The twelve registers, R4−R15, are general-purpose registers. All of these registers can be used as data
6.4 Addressing Modes
As/Ad
HALIOS® MULTI-PURPOSE OPTICAL SENSOR WITH HIGH LIGHT IMMUNITY
00/0
01/1
01/1
01/1
10/-
11/-
R2
R3
R3
R3
R3
No special instructions required
No additional code word for the six constants
No code memory access required to retrieve the constant
Addressing Mode
Register mode
Indexed mode
Symbolic mode
Absolute mode
Indirect Register mode
Indirect auto increment
As
11
00
01
10
11
Value
Syntax
Rn
X(Rn)
ADDR
&ADDR
@Rn
@Rn+
0FFFFh
00008h
00000h
00001h
00002h
Data Sheet 25 / 67
Remarks
+8, bit processing
0, byte processing
+1
+2, bit processing
-1, word processing
Description
Register contents are operand
(Rn + X) point to the operand. Xis stored
in the next word
(Rn + X) point to the operand. Xis stored
in the next word. Indexed mode X(PC) is
used.
The word following the instruction con-
tains the absolute address. X
is stored in the next word. Indexed
mode X(SR) is used.
Rn is used as a pointer to the
operand.
Rn is used as a pointer to the operand.
Rn is incremented afterwards by 1 for .B
instructions and by 2 for .W instructions.
QM-No.: 25DS0014E.00
E909.05

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