M24C64-WMN6TP STMicroelectronics, M24C64-WMN6TP Datasheet - Page 18

IC EEPROM 64KBIT 400KHZ 8SOIC

M24C64-WMN6TP

Manufacturer Part Number
M24C64-WMN6TP
Description
IC EEPROM 64KBIT 400KHZ 8SOIC
Manufacturer
STMicroelectronics
Datasheets

Specifications of M24C64-WMN6TP

Format - Memory
EEPROMs - Serial
Memory Type
EEPROM
Memory Size
64K (8K x 8)
Speed
400kHz
Interface
I²C, 2-Wire Serial
Voltage - Supply
2.5 V ~ 5.5 V
Operating Temperature
-40°C ~ 85°C
Package / Case
8-SOIC (3.9mm Width)
Density
64Kb
Interface Type
Serial (I2C)
Organization
8Kx8
Access Time (max)
900ns
Frequency (max)
400KHz
Write Protection
Yes
Data Retention
40Year
Operating Supply Voltage (typ)
3.3/5V
Package Type
SOIC
Operating Temp Range
-40C to 85C
Supply Current
5mA
Operating Supply Voltage (min)
2.5V
Operating Supply Voltage (max)
5.5V
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
8
Maximum Clock Frequency
0.4 MHz
Access Time
900 ns
Supply Voltage (max)
5.5 V
Supply Voltage (min)
2.5 V
Maximum Operating Current
2 mA
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
Operating Supply Voltage
3.3 V, 5 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
497-8650-2
M24C64-WMN6TP
Q2040217A

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Device operation
4.10
4.11
18/44
Lock Identification Page (M24C64-D only)
The Lock Identification Page instruction (Lock ID) permanently locks the Identification Page
in Read-only mode. The Lock ID instruction is similar to Byte Write (into memory array) with
the following specific conditions:
If the Identification Page is locked, the data bytes transferred during the Lock Identification
Page instruction are not acknowledged (NoAck).
ECC (Error Correction Code) and Write cycling
The M24C64 devices identified with the process letter A or K offer an ECC (Error Correction
Code) logic which compares each 4-byte word with its associated 6 EEPROM bits of ECC.
As a result, if a single bit out of 4 bytes of data happens to be erroneous during a Read
operation, the ECC detects it and replaces it by the correct value. The read reliability is
therefore much improved by the use of this feature.
Note however that even if a single byte has to be written, 4 bytes are internally modified
(plus the ECC bits), that is, the addressed byte is cycled together with the three other bytes
making up the word. It is therefore recommended to write by word (4 bytes) at address 4*N
(where N is an integer) in order to benefit from the larger amount of Write cycles.
The M24C64 devices are qualified as 1 million (1,000,000) Write cycles, using a cycling
routine that writes to the device by multiples of 4-byte words.
Device type identifier = 1011b
Address bit A10 must be ‘1’; all other address bits are don't care
The data byte must be equal to the binary value xxxx xx1x, where x is don't care
Doc ID 16891 Rev 23
M24C64-DF, M24C64-W, M24C64-R, M24C64-F

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