CY7C1360C-200AJXC Cypress Semiconductor Corp, CY7C1360C-200AJXC Datasheet - Page 24

• Manufacturer Part Number: CY7C1360C-200AJXC
• Description: IC SRAM 9MBIT 200MHZ 100LQFP
• Manufacturer: Cypress Semiconductor Corp
• Type: Synchronousr

Specifications of CY7C1360C-200AJXC

• Memory Size: 9M (256K x 36)
• Package / Case: 100-LQFP
• Format - Memory: RAM
• Memory Type: SRAM - Synchronous
• Speed: 200MHz
• Interface: Parallel
• Voltage - Supply: 3.135 V ~ 3.6 V
• Operating Temperature: 0°C ~ 70°C
• Access Time: 3 ns
• Maximum Clock Frequency: 200 MHz
• Supply Voltage (max): 3.6 V
• Supply Voltage (min): 3.135 V
• Maximum Operating Current: 220 mA
• Maximum Operating Temperature: + 70 C
• Minimum Operating Temperature: 0 C
• Mounting Style: SMD/SMT
• Number Of Ports: 4
• Operating Supply Voltage: 3.3 V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant
• Other names: 428-2125; CY7C1360C-200AJXC

Switching Waveforms
Note
Document Number: 38-05540 Rev. *K
27. On this diagram, when CE is LOW: CE
Data Out (Q)
GW, BWE,
ADDRESS
ADSP
ADSC
BWx
ADV
CLK
OE
CE
t
ADS
t AS
t CES
A1
t
ADH
t AH
t CEH
t
CH
High-Z
t CYC
t WES
t
CL
Single READ
t CLZ
t WEH
t CO
1
is LOW, CE
t ADS
A2
Q(A1)
t ADH
t OEHZ
t ADVS
2
is HIGH and CE
Figure 6. Read Cycle Timing
t ADVH
t OELZ
t OEV
Q(A2)
DON’T CARE
t DOH
t CO
3
is LOW. When CE is HIGH: CE
Q(A2 + 1)
ADV
suspends
burst.
UNDEFINED
Q(A2 + 2)
[27]
BURST READ
1
is HIGH or CE
CY7C1360C, CY7C1362C
Q(A2 + 3)
2
is LOW or CE
A3
Q(A2)
Burst continued with
new base address
Burst wraps around
to its initial state
Q(A2 + 1)
3
is HIGH.
t CHZ
Deselect
cycle
Page 24 of 34
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