CY7C1360C-200AJXC Cypress Semiconductor Corp, CY7C1360C-200AJXC Datasheet - Page 26

• Manufacturer Part Number: CY7C1360C-200AJXC
• Description: IC SRAM 9MBIT 200MHZ 100LQFP
• Manufacturer: Cypress Semiconductor Corp
• Type: Synchronousr

Specifications of CY7C1360C-200AJXC

• Memory Size: 9M (256K x 36)
• Package / Case: 100-LQFP
• Format - Memory: RAM
• Memory Type: SRAM - Synchronous
• Speed: 200MHz
• Interface: Parallel
• Voltage - Supply: 3.135 V ~ 3.6 V
• Operating Temperature: 0°C ~ 70°C
• Access Time: 3 ns
• Maximum Clock Frequency: 200 MHz
• Supply Voltage (max): 3.6 V
• Supply Voltage (min): 3.135 V
• Maximum Operating Current: 220 mA
• Maximum Operating Temperature: + 70 C
• Minimum Operating Temperature: 0 C
• Mounting Style: SMD/SMT
• Number Of Ports: 4
• Operating Supply Voltage: 3.3 V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant
• Other names: 428-2125; CY7C1360C-200AJXC

Switching Waveforms
Notes
Document Number: 38-05540 Rev. *K
30. On this diagram, when CE is LOW: CE
31. The data bus (Q) remains in high Z following a write cycle, unless a new read access is initiated by ADSP or ADSC.
32. GW is HIGH.
Data Out (Q)
Data In (D)
ADDRESS
ADSP
ADSC
BWE,
ADV
BW
CLK
OE
CE
X
A1
High-Z
High-Z
t ADS
t CES
t AS
A2
t ADH
t CEH
t CH
t AH
Back-to-Back READs
t CYC
t CLZ
Q(A1)
t CL
t CO
(continued)
1
is LOW, CE
Q(A2)
t OEHZ
Figure 8. Read/Write Cycle Timing
2
is HIGH and CE
t WES
t DS
D(A3)
Single WRITE
A3
t DH
t WEH
DON’T CARE
A4
3
is LOW. When CE is HIGH: CE
t OELZ
UNDEFINED
Q(A4)
[30, 31, 32]
BURST READ
Q(A4+1)
1
is HIGH or CE
CY7C1360C, CY7C1362C
Q(A4+2)
2
is LOW or CE
Q(A4+3)
3
is HIGH.
D(A5)
A5
Back-to-Back
WRITEs
Page 26 of 34
D(A6)
A6
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