M25P20-VMN6TPB NUMONYX, M25P20-VMN6TPB Datasheet - Page 24

• Manufacturer Part Number: M25P20-VMN6TPB
• Description: IC FLASH 2MBIT 75MHZ 8SOIC
• Manufacturer: NUMONYX
• Series: Forté™r

Specifications of M25P20-VMN6TPB

• Format - Memory: FLASH
• Memory Type: FLASH
• Memory Size: 2M (256K x 8)
• Speed: 75MHz
• Interface: SPI, 3-Wire Serial
• Voltage - Supply: 2.3 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 8-SOIC (3.9mm Width)
• Package: 8SO N
• Cell Type: NOR
• Density: 2 Mb
• Architecture: Sectored
• Block Organization: Symmetrical
• Typical Operating Supply Voltage: 3.3 V
• Sector Size: 64KByte x 4
• Timing Type: Synchronous
• Interface Type: Serial-SPI
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: M25P20-VMN6TPBTR

6.6
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Read Data Bytes (READ)
The device is first selected by driving Chip Select (S) Low. The instruction code for the Read
Data Bytes (READ) instruction is followed by a 3-byte address (A23-A0), each bit being
latched-in during the rising edge of Serial Clock (C). Then the memory contents, at that
address, is shifted out on Serial Data Output (Q), each bit being shifted out, at a maximum
frequency f
The instruction sequence is shown in
The first byte addressed can be at any location. The address is automatically incremented
to the next higher address after each byte of data is shifted out. The whole memory can,
therefore, be read with a single Read Data Bytes (READ) instruction. When the highest
address is reached, the address counter rolls over to 000000h, allowing the read sequence
to be continued indefinitely.
The Read Data Bytes (READ) instruction is terminated by driving Chip Select (S) High. Chip
Select (S) can be driven High at any time during data output. Any Read Data Bytes (READ)
instruction, while an Erase, Program or Write cycle is in progress, is rejected without having
any effects on the cycle that is in progress.
Figure 12. Read Data Bytes (READ) instruction sequence and data-out sequence
1. Address bits A23 to A18 are Don’t Care.
S
C
D
Q
0
R
, during the falling edge of Serial Clock (C).
1
High Impedance
2
Instruction
3
4
5
6
7
MSB
23
8
22 21
9 10
Figure
24-Bit Address
12.
3
28 29 30 31 32 33 34 35
2
1
0
MSB
7
6
5
Data Out 1
4
3
36 37 38
2
1
0
39
7
AI03748D