M25PX80-VMN6TP NUMONYX, M25PX80-VMN6TP Datasheet - Page 21

• Manufacturer Part Number: M25PX80-VMN6TP
• Description: IC FLASH 8MBIT 75MHZ 8SOIC
• Manufacturer: NUMONYX
• Series: Forté™r

Specifications of M25PX80-VMN6TP

• Format - Memory: FLASH
• Memory Type: FLASH
• Memory Size: 8M (1M x 8)
• Speed: 75MHz
• Interface: SPI, 3-Wire Serial
• Voltage - Supply: 2.3 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 8-SOIC (3.9mm Width)
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: M25PX80-VMN6TPTR

6.1
Table 5.
Write Enable (WREN)
The Write Enable (WREN) instruction
The Write Enable Latch (WEL) bit must be set prior to every Page Program (PP), Dual Input
Fast Program (DIFP), Program OTP (POTP), Write to Lock Register (WRLR), Subsector
Erase (SSE), Sector Erase (SE), Bulk Erase (BE) and Write Status Register (WRSR)
instruction.
The Write Enable (WREN) instruction is entered by driving Chip Select (S) Low, sending the
instruction code, and then driving Chip Select (S) High.
Figure 7.
Instruction
DOFR
ROTP
POTP
DIFP
RDP
SSE
DP
PP
SE
BE
Instruction set (page 2 of 2)
Write Enable (WREN) instruction sequence
Dual Output Fast Read
Read OTP (Read 64 bytes of
OTP area)
Program OTP (Program 64
bytes of OTP area)
Page Program
Dual Input Fast Program
Subsector Erase
Sector Erase
Bulk Erase
Deep Power-down
Release from Deep Power-
down
S
C
DQ0
DQ1
Description
High Impedance
0
(Figure
1
2
One-byte instruction
Instruction
0100 0010
0000 0010
1010 0010
0010 0000
0011 1011
0100 1011
1101 1000
1011 1001
1010 1011
1100 0111
3
7) sets the Write Enable Latch (WEL) bit.
4
code
5
6
7
ABh
3Bh
4Bh
A2h
D8h
C7h
B9h
42h
02h
20h
Address
bytes
AI13731
3
3
3
3
3
3
3
0
0
0
Dummy
bytes
1
1
0
0
0
0
0
0
0
0
1 to 256
1 to 256
1 to 65
1 to 65
bytes
1 to ∞
Data
0
0
0
0
0
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