AT45DB081D-SSU-2.5 Atmel, AT45DB081D-SSU-2.5 Datasheet - Page 10

• Manufacturer Part Number: AT45DB081D-SSU-2.5
• Description: IC FLASH 8MBIT 50MHZ 8SOIC
• Manufacturer: Atmel

Specifications of AT45DB081D-SSU-2.5

• Format - Memory: FLASH
• Memory Type: DataFLASH
• Memory Size: 8M (4096 pages x 264 bytes)
• Speed: 50MHz
• Interface: SPI, RapidS
• Voltage - Supply: 2.5 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 8-SOIC (3.9mm Width)
• Architecture: Sectored
• Interface Type: SPI
• Supply Voltage (max): 3.6 V
• Supply Voltage (min): 2.5 V
• Maximum Operating Current: 15 mA
• Mounting Style: SMD/SMT
• Organization: 64 KB x 16
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

7.6
Table 7-2.
7.7
10
PA11/
A19
0
0
0
0
1
1
1
1
•
•
•
Sector Erase
Chip Erase
Atmel AT45DB081D
PA10/
A18
0
0
0
0
1
1
1
1
•
•
•
Sector Erase Addressing
PA9/
A17
0
0
0
1
0
0
1
1
•
•
•
The Sector Erase command can be used to individually erase any sector in the main memory.
There are 16 sectors and only one sector can be erased at one time. To perform sector 0a or
sector 0b erase for the Atmel
must be loaded into the device, followed by three address bytes comprised of three don’t care
bits, nine page address bits (PA11 - PA3) and 12 don’t care bits. To perform a sector 1-15 erase,
the opcode 7CH must be loaded into the device, followed by three address bytes comprised of
three don’t care bits, four page address bits (PA11 - PA8) and 17 don’t care bits. To perform
sector 0a or sector 0b erase for the binary page size (256-bytes), an opcode of 7CH must be
loaded into the device, followed by three address bytes comprised of four don’t care bit and nine
page address bits (A19 - A11) and 11 don’t care bits. To perform a sector 1-15 erase, the
opcode 7CH must be loaded into the device, followed by three address bytes comprised of four
don’t care bit and four page address bits (A19 - A16) and 16 don’t care bits. The page address
bits are used to specify any valid address location within the sector which is to be erased. When
a low-to-high transition occurs on the CS pin, the part will erase the selected sector. The erase
operation is internally self-timed and should take place in a maximum time of t
time, the status register will indicate that the part is busy.
The entire main memory can be erased at one time by using the Chip Erase command.
To execute the Chip Erase command, a 4-byte command sequence C7H, 94H, 80H and 9AH
must be clocked into the device. Since the entire memory array is to be erased, no address
bytes need to be clocked into the device, and any data clocked in after the opcode will be
ignored. After the last bit of the opcode sequence has been clocked in, the CS pin can be deas-
serted to start the erase process. The erase operation is internally self-timed and should take
place in a time of t
The Chip Erase command will not affect sectors that are protected or locked down; the contents
of those sectors will remain unchanged. Only those sectors that are not protected or locked
down will be erased.
PA8/
A16
0
0
1
0
0
1
0
1
•
•
•
PA7/
A15
X
X
X
X
X
X
0
0
•
•
•
CE
. During this time, the Status Register will indicate that the device is busy.
PA6/
A14
X
X
X
X
X
X
0
0
•
•
•
®
PA5/
A13
0
0
X
X
X
X
X
X
DataFlash
•
•
•
PA4/
A12
X
X
X
X
X
X
0
0
•
•
•
®
standard page size (264-bytes), an opcode of 7CH
PA3/
A11
X
X
X
X
X
X
0
1
•
•
•
PA2/
A10
X
X
X
X
X
X
X
X
•
•
•
PA1/
A9
X
X
X
X
X
X
X
X
•
•
•
PA0/
A8
X
X
X
X
X
X
X
X
•
•
•
3596M–DFLASH–5/10
SE
. During this
Sector
0a
0b
12
13
14
15
1
2
•
•
•