ADE7753ARSZ Analog Devices Inc, ADE7753ARSZ Datasheet - Page 47

• Manufacturer Part Number: ADE7753ARSZ
• Description: IC ENERGY METERING 1PHASE 20SSOP
• Manufacturer: Analog Devices Inc

Specifications of ADE7753ARSZ

• Input Impedance: 390 KOhm
• Measurement Error: 0.1%
• Voltage - I/o High: 2.4V
• Voltage - I/o Low: 0.8V
• Current - Supply: 3mA
• Voltage - Supply: 4.75 V ~ 5.25 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 20-SSOP (0.200", 5.30mm Width)
• Meter Type: Single Phase
• Ic Function: Single-Phase Multifunction Metering IC
• Supply Voltage Range: 4.75V To 5.25V
• Operating Temperature Range: -40°C To +85°C
• Digital Ic Case Style: SSOP
• No. Of Pins: 20
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: EVAL-ADE7753ZEB - BOARD EVALUATION AD7753
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

The impulse/LSB ratio used to convert the value in t
LVARENERGY register into a pulse output can be expressed in
terms of impulses/VA
where the accumulation time is calculated from Equation 37
The line period can be determined from the PERI
according to Equation 38. Then VAR can be determined fro
the LVARENERGY register value:
The PERIOD
is the correction factor for the 1/f frequency attenuation of the
low-pass filter. The PERIOD
calibration and could represent a frequency other than 50 Hz.
CLKIN FREQUENCY
In this data sheet, the characteristics of the ADE7753 are shown
when CLKIN frequency is equal to 3.579545 MHz. However, the
ADE7753 is designed to have the same accuracy at any CLKIN
frequency within the specified range. If the CLKIN frequency is
not 3.579545 MHz, various timing and filter characteristics need
to be redefined with the new CLKIN frequency. For example,
the cutoff frequencies of all digital filters such as LPF1, LPF2, or
HPF1, shift in proportion to the change in CLKIN frequency
according to the following equation:
The change of CLKIN frequency does not affect the timing
characteristics of the serial interface because the data transfer is
synchronized with serial clock signal (SCLK). But one needs to
observe the read/write timing of the serial data transfer—see
the ADE7753 timing characteristics in Table 2. Table 9 lists
various timing changes that are affected by CLKIN frequency.
imp/LSB =
VARCF
VARCF
VARh =
VAR =
VARConstan
New
LVARENERGY
Frequency
IB(expected)
IB(nominal)
50 Hz
LVARENERGY
Accumulati
/PERIOD factor in the preceding VAR equations
imp
t
(
imp
=
IB
=
=
/
Original
VARh
3600
Rh and VARh/LSB.
×
LVARENERGY
/
Accumulati
VARh
VARh
s/h
×
on
VARh
IB
50 Hz
Frequency
/
time
)
LSB
×
×
PERIOD
VARh
V
term refers to the line period at
nominal
(s)
/
on
×
LSB
3600
×
time
IB
/
PERIOD
×
LSB
=
×
CLKIN
×
s/h
VARCF
(s)
PERIOD
. 3
I
×
VARCF
b
579545
×
PERIOD
PERIOD
×
PERIOD
sin(
Frequency
IB
nominal
OD register
(
ϕ
50
MHz
expected
)
he
Hz
50
50
Hz
Hz
)
m
(73)
(74)
(7
(76
(77)
(78)
Rev. A | Page 47 of 60
.
5)
)
Table 9. Frequen
Parameter
Nyquist Frequency for CH 1 and CH 2 ADCs
PHCAL Resolution (Seconds per LSB)
Active Energy Register Update Rate (Hz)
Waveform Sampling Rate (per Second)
WAVSEL 1,0 =
Maximum ZXTOUT Period
SUSPENDING ADE7753 FUNCTIONALITY
The analog and the digital circuit can be suspended separately.
The analog portion of the ADE7753 can be suspended by setting
the ASUSPEND bit (Bit 4) of the mode register to logic high—
see the Mode Register (0x9) section. In suspend mode, all wave-
form samples from the ADCs are set to 0. The digital circuitry
can be halted by stopping the CLKIN input and maintaining a
logic high or low on the CLKIN pin. The ADE7753 can be
reactivated by restoring the CLKIN input and setting the
ASUSPEND bit to logic low.
CHECKSUM REGISTER
The ADE7753 has a checksum register (CHECKSUM[5:0]) to
ensure the data bits received in the last serial read operation are
not corrupted. The 6-bit checksum register is reset before the
first bit (MSB of the register to be read) is put on the DOUT
pin. During a serial read operation, when each data bit becomes
available on the rising edge of SCLK, the bit is added to the
checksum register. In the end of the serial read operation, the
content of the checksum register is equal to the sum of all ones
in the register previously read. Using the checksum register, the
user can determine if an error has occurred during the last read
operation. Note that a read to the checksum register also
generates a checksum of the checksum register itself.
DOUT
Figure 88. Checksum Register for Serial Interface Read
0 1
1 0
1 1
cy Dependencies of the ADE7753 Parameters
0 0
+
+
CONTENT OF REGISTER (n-bytes)
CHECKSUM REGISTER ADDR: 0x3E
CLKIN Dependency
CLKIN/8
4/CLKIN
CLKIN/4
CLKIN/128
CLKIN/256
CLKIN/512
CLKIN/1024
524,288/CLKIN
ADE7753
02875-0-077