ADE7753ARSZ Analog Devices Inc, ADE7753ARSZ Datasheet - Page 54

• Manufacturer Part Number: ADE7753ARSZ
• Description: IC ENERGY METERING 1PHASE 20SSOP
• Manufacturer: Analog Devices Inc

Specifications of ADE7753ARSZ

• Input Impedance: 390 KOhm
• Measurement Error: 0.1%
• Voltage - I/o High: 2.4V
• Voltage - I/o Low: 0.8V
• Current - Supply: 3mA
• Voltage - Supply: 4.75 V ~ 5.25 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 20-SSOP (0.200", 5.30mm Width)
• Meter Type: Single Phase
• Ic Function: Single-Phase Multifunction Metering IC
• Supply Voltage Range: 4.75V To 5.25V
• Operating Temperature Range: -40°C To +85°C
• Digital Ic Case Style: SSOP
• No. Of Pins: 20
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: EVAL-ADE7753ZEB - BOARD EVALUATION AD7753
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

ADE7753
ADE7753 REGISTER DESCRIPTIONS
All ADE7753 functionality is accessed via the on-chip registers.
and th
COM
The c
processor. All data transfer operations must begin with a write t
regist
desig
DB7
W/R
Table 11. Communications Register
Bit
Location
0 to 5
6
7
MODE REGISTER (0x09)
The ADE7753 functionality is configured by writing to the mode register. Table 12 describes the functionality of each bit in the register.
Table 12. Mode Register
Bit
Location
0
1
2
3
4
5
6
7
8
9
10
12, 11
nation
er det
omm
MU
en transferring the r ister data. A ful escription
NICATI
unications
ermines
s for th
Bit
Mnemonic
DISHPF
DISLPF2
DISCF
DISSAG
ASUSPEND
TEMPSEL
SWRST
CYCMODE
DISCH1
DISCH2
SWAP
DTRT1, 0
Bit
Mnemonic
A0 to A5
RESERVED
W/R
DB6
0
e comm
ONS R
whether the n
regis
eg
ter
uni
EGISTER
Default
Value
0
0
1
1
0
0
0
0
0
0
0
00
is a
catio s register
Description
The six LSBs of the communications register specify the register for the data transfer operation. Table 10 lists
the address of each ADE7753 on-chip register.
This bit is unused and should be set to 0.
When this bit is a Logic 1, the data transfer operation immediately following the write to the
communications register is interpreted as a write to the ADE7753.
When this bit is a Logic 0, the data transfer operation immediately following the write to the
communications register is interpreted as a read operation.
n 8
ext o
n
DB5
A5
-bit, wri
peration is a read o
Description
HPF (high-pass filter) in Channel 1 is disabled when this bit is set.
LPF (low-pass filter) after the multiplier (LPF2) is disabled when this bit is set.
Frequency output CF is disabled when this bit is set.
Line voltage sag detection is disabled when this bit is set.
By setting this bit to Logic 1, both ADE7753 A/D converters can be turned off. In normal
operation, this bit should be left at Logic 0. All digital functionality can be stopped by suspending
the clock signal at CLKIN pin.
Temperature conversion starts when this bit is set to 1. This bit is automatically reset to 0 when
the temperature conversion is finished.
Software Chip Reset. A data transfer should not take place to the ADE7753 for at least 18 µs after a
software reset.
Setting this bit to Logic 1 places the chip into line cycle energy accumulation mode.
ADC 1 (Channel 1) inputs are internally shorted together.
ADC 2 (Channel 2) inputs are internally shorted together.
By setting this bit to Logic 1 the analog inputs V2P and V2N are connected to ADC 1 and the
analog inputs V1P and V1N are connected to ADC 2.
These bits are used to select the waveform register update rate.
DTRT 1
0
0
1
1
l d
te-on
.
ly regis
DB4
A4
ter
of
r a
the
wh
Rev. A | Page 54 of 60
wr
ich controls the serial data transfer between the ADE7753 and the host
o the communications register. The data written to the communications
serial inter
ite and which register is being accessed. Table 11 outlines the bit
Each register is accessed by first writing to the communicat
DTRT0
0
1
0
1
DB3
A3
face protocol is given in the ADE7753 Serial Interface section.
Update Rate
27.9 kSPS (CLKIN/128)
14 kSPS (CLKIN/256)
7 kSPS (CLKIN/512)
3.5 kSPS (CLKIN/1024)
DB2
A2
A1
DB1
ions register
DB0
A0