LT1641-2CS8#TRPBF Linear Technology, LT1641-2CS8#TRPBF Datasheet
LT1641-2CS8#TRPBF
Specifications of LT1641-2CS8#TRPBF
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LT1641-2CS8#TRPBF Summary of contents
Page 1
... The chips feature a programmable analog foldback cur- rent limit circuit. If the chips remain in current limit for more than a programmable time, the N-channel pass transistor is either latched off (LT1641- set to automatically restart after a time-out delay (LT1641-2). The PWRGD output indicates when the output voltage, sensed by the FB pin, is within tolerance ...
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... Output Voltage (PWRGD) ........................– 0.3V to 100V Output Voltage (GATE) ............................– 0.3V to 100V Operating Temperature Range LT1641-1C, LT1641-2C ........................... 0°C to 70°C LT1641-1I, LT1641-2I ........................ – 40°C to 85°C Storage Temperature Range ................. – 65°C to 150°C Lead Temperature (Soldering, 10 sec).................. 300°C DC ELECTRICAL CHARACTERISTICS ...
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... V = 48V CC 0.090 0.085 0.080 0.075 0.070 0.065 0.060 0.055 0.050 0.045 0.040 100 –50 – TEMPERATURE (°C) LT1641-1/LT1641-2 = 24V MIN TYP 6 1.7 3.2 1.5 0 Pin Low Voltage Threshold vs Temperature 1.250 V = 48V 1.245 CC 1.240 1.235 1.230 1.225 1.220 1.215 1.210 1 ...
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... LT1641-1/LT1641 TYPICAL PERFOR A CE CHARACTERISTICS Gate Drive vs Temperature 48V 10. –50 – 100 TEMPERATURE (°C) 1641-1 G07 TIMER Pin Pull Up Current –45° 0° 25° 85° (V) CC 1641-1 G10 ON Pin Voltage Hysteresis vs Temperature 0.100 V = 48V CC 0.090 0.080 0.070 0.060 0.050 –50 –25 ...
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... When the TIMER pin falls below 0.5V, the GATE pin either turns on automatically (LT1641-2) or turns on once the ON pin is pulsed low to reset the internal fault latch (LT1641-1). If the ON pin is not cycled low, the GATE pin remains latched off. Use no less than 1.5nF for the timing capacitor, C2. ...
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... LT1641-1/LT1641-2 W BLOCK DIAGRA GEN P FB REF GEN 1.233V 8.3V 0.5V 1.233V TEST CIRCUIT 6 SENSE V P – 12mV ~ 47mV + + 0.5V – + – – UNDERVOLTAGE LOCKOUT + LOGIC + – + – SENSE + V PWRGD GATE 5V 5k GND TIMER 1641-1 F01 Figure 1 CHARGE PUMP AND GATE GATE ...
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... GATE pin to maintain a constant voltage across the sense resistor. Once the voltage at the output has reached its final value, as sensed by resistors R3 and R4, the PWRGD pin goes high. LT1641-1/LT1641-2 1.313V 1.233V t PLHFB 1V Figure 3 ...
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... If the current limit circuit turns off, the TIMER pin will be discharged to GND by the 3µA current source. Whenever the TIMER pin reaches 1.233V, either the inter- nal fault latch is set (LT1641-1) or the autorestart latch is set (LT1641-2). The GATE pin is immediately pulled to GND and the TIMER pin is pulled back to GND by the 3µA Figure 6 ...
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... Figure 7. Current Limit Sense Voltage vs Feedback Pin Voltage current source. When the TIMER pin falls below 0.5V, the GATE pin either turns on automatically (LT1641-2) or once the ON pin is pulsed low to reset the internal fault latch (LT1641-1). The waveform in Figure 9 shows how the output latches off following a short-circuit ...
Page 10
... Zener diode between its gate and source (as D1 shown is Figure 5 0.025Ω IRF530 D1 CMPZ R5 R3 5248B 10Ω 59k R6, 10nF D2 1k, 5% 30V 1N5256B SENSE GATE 3.57k LT1641 PWRGD TIMER GND 0.68µF Figure 10. Overvoltage Detection V OUT + 24k 5% PWRGD 1641-1 F10 164112fc ...
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... F13 Figure 14. Recommended Layout for R1, R2 and R LT1641-1/LT1641-2 and GND short. A 0.1µF capacitor from the CC ACTIVE LOW ENABLE MODULE OUT + C L 220µF V OUT ON/OFF V – V – IN OUT 1641-1 F12 I LOAD SENSE RESISTOR, R LT1641 LOAD 1641-1 F14 S S 164112fc 11 ...
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... LT1641-1/LT1641-2 PACKAGE DESCRIPTIO .050 BSC .245 MIN .030 ±.005 TYP RECOMMENDED SOLDER PAD LAYOUT .010 – .020 (0.254 – 0.508) .008 – .010 (0.203 – 0.254) (0.406 – 1.270) NOTE: 1. DIMENSIONS IN (MILLIMETERS) 2. DRAWING NOT TO SCALE 3. THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS. ...