DS1864T+ Maxim Integrated Products, DS1864T+ Datasheet - Page 56

IC LASER CTRLR 1CHAN 5.5V 28TQFN

DS1864T+

Manufacturer Part Number
DS1864T+
Description
IC LASER CTRLR 1CHAN 5.5V 28TQFN
Manufacturer
Maxim Integrated Products
Type
Laser Diode Controller (Fiber Optic)r
Datasheet

Specifications of DS1864T+

Number Of Channels
1
Voltage - Supply
2.97 V ~ 5.5 V
Current - Supply
3mA
Operating Temperature
-40°C ~ 95°C
Package / Case
28-WFQFN Exposed Pad
Mounting Type
Surface Mount
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
SFP Laser Controller and
Diagnostic IC
56
Table 04h (Table 01h in DS1859 Configuration), C1h: PW2 Password Write-Enable Byte
FACTORY DEFAULT:
MEMORY TYPE:
This byte configures the Write protection of PW2. This is discussed in more detail in the Memory Protection and Password section.
____________________________________________________________________
C1h
bit7
bit7
bit6
bit5
bit4
bit3
bit2
bit1
bit0
2
7
When this bit is set, PW2 Write protection is enabled for the memory block consisting of registers D0h
through D6h in the Main Device memory, Table 05h.
0 = Memory is unprotected (PW2 level).
1 = Memory is protected (PW2 level).
When this bit is set, PW2 Write protection is enabled for the memory block consisting of registers F8h
through FFh in the Main Device memory, Table 05h.
0 = Memory is unprotected (PW2 level).
1 = Memory is protected (PW2 level).
When this bit is set, PW2 Write protection is enabled for the memory block consisting of registers 80h
through C7h in the Main Device memory, Table 04h (Table 01h in DS1859 configuration), Table 02h,
and Table 03h.
0 = Memory is unprotected (PW2 level).
1 = Memory is protected (PW2 level).
When this bit is set, PW2 Write protection is enabled for the memory block consisting of registers F8h
through FFh in the Main Device memory, Table 01h (Table 00h in DS1859 configuration).
0 = Memory is unprotected (PW2 level).
1 = Memory is protected (PW2 level).
When this bit is set, PW2 Write protection is enabled for the memory block consisting of registers 80h
through F7h in the Main Device memory, Table 01h (Table 00h in DS1859 configuration).
0 = Memory is unprotected (PW2 level).
1 = Memory is protected (PW2 level).
When this bit is set, PW2 Write protection is enabled for the memory block consisting of registers 00h
through 7Ah in the Main Device memory.
0 = Memory is unprotected (PW2 level).
1 = Memory is protected (PW2 level).
When this bit is set, PW2 Write protection is enabled for the memory block consisting of registers 80h
through FFh in the Auxiliary Device memory of I
0 = Memory is unprotected (PW2 level).
1 = Memory is protected (PW2 level).
When this bit is set, PW2 Write protection is enabled for the memory block consisting of registers 00h
through 7Fh in the Auxiliary Device memory of I
0 = Memory is unprotected (PW2 level).
1 = Memory is protected (PW2 level).
00h
Shadowed Memory (SEE)
2
6
2
5
2
4
2
2
C slave address A0h.
C slave address A0h.
2
3
2
2
2
1
bit0
2
0

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