IR21571PBF International Rectifier, IR21571PBF Datasheet - Page 12

IC CONTROLLER BALLAST 16DIP

IR21571PBF

Manufacturer Part Number
IR21571PBF
Description
IC CONTROLLER BALLAST 16DIP
Manufacturer
International Rectifier
Type
Ballast Controllerr
Datasheet

Specifications of IR21571PBF

Frequency
45.5 ~ 50.5 kHz
Current - Supply
5.5mA
Current - Output
500mA
Voltage - Supply
11.4 V ~ 15.6 V
Operating Temperature
-40°C ~ 125°C
Package / Case
16-DIP (0.300", 7.62mm)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
*IR21571PBF
Three leads on the IR21571 are used for protection, as shown in Figure 10 below. These are V
monitor), S
The first of these protection leads senses the voltage
on the DC bus by means of an external resistor
divider and an internal comparator with hysteresis.
When power is first supplied to the IC at system
startup, 3 conditions are required before oscillation
is initiated: 1.) the voltage on the V
the rising undervoltage lockout threshold (11.5V),
2.) the voltage at the V
3.) the voltage on the SD lead must be below
approximately 1.85V. If a low dc bus condition occurs
during normal operation, or if power to the ballast is
shut off, the dc bus will collapse prior to the V
chip (assuming the V
IR21571 (S) & (PbF)
12
Figure 10: Lamp protection & automatic restart circuitry block diagram with external component connection.
Sensing the DC Bus Voltage
+V
D
BUS
(unlatched shutdown), C
R2
R1
R
OC
Lamp Protection & Automatic Restart Circuitry Operation
C1
CPH
VDC
OC
DT
DC
CC
1
2
7
8
lead must exceed 5.1V, and
7.6V
is derived from a charge
7.6V
50uA
3.0V
5.1V
1.0uA
5.1V
4.0V
CC
lead must exceed
VOLTAGE
DETECT
UNDER-
S
S
R
(latched shutdown) and OC (CS+ threshold programming).
Q
Q
CC
of the
from oscillator
Q
Q
section
S
R
DETECT
OVER-
TEMP
pump off of the output of the half-bridge). In this
case, the voltage on the V
off, thereby protecting the power transistors from
potentially hazardous hard switching. Approximately
2V of hysteresis has been designed into the internal
comparator sensing the V
for variations in the dc bus voltage under varying
load conditions. When the dc bus recovers, the chip
restarts from the beginning of the control sequence,
as shown in timing diagram Figure 11.
T
R
Q
Q
Q
Q
CLK
R
D
2.0V
0.2V
7.6V
7.6V
10
9
DC
DC
CS
SD
lead will shut the oscillator
lead, in order to account
R3
Q2
C2
R4
lamp cathode
from lower
R
CS
www.irf.com
R5
V
DC
CC
(dc bus

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