LM3150MH/NOPB National Semiconductor, LM3150MH/NOPB Datasheet - Page 15

• Manufacturer Part Number: LM3150MH/NOPB
• Description: IC REG SWITCH CTRL 6-42V 14TSSOP
• Manufacturer: National Semiconductor
• Series: PowerWise®, SIMPLE SWITCHER®r
• Type: Step-Down (Buck)r

Specifications of LM3150MH/NOPB

• Internal Switch(s): No
• Synchronous Rectifier: Yes
• Number Of Outputs: 1
• Voltage - Output: Adj to 0.6V
• Current - Output: 12A
• Frequency - Switching: 1MHz
• Voltage - Input: 6 ~ 42 V
• Operating Temperature: -40°C ~ 125°C
• Mounting Type: Surface Mount
• Package / Case: 14-TSSOP Exposed Pad, 14-eTSSOP 14-HTSSOP
• Package: 14TSSOP EP
• Output Voltage: 0.6(Min) V
• Output Current: 12(Max) A
• For Use With: 551600142-002 - WEBENCH BUILD IT BOARD LM3150
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Power - Output: -
• Other names: LM3150MH

capacitance can decrease by as much as 50% when the ap-
plied voltage is only 30% of the rated voltage. The chosen
capacitor should also be able to handle the rms current which
is equal to:
For this design the chosen ripple current ratio, r = 0.3, repre-
sents the ratio of inductor peak-to-peak current to load current
I
ceptable to choose r between 0.25 to 0.5. The nomographs
in this datasheet all use 0.3 as the ripple current ratio.
Minimum output capacitance is:
The maximum ESR allowed to prevent over-voltage protec-
tion during normal operation is:
For this design a feed-forward capacitor will be used to help
minimize output ripple.
The minimum ESR must meet both of the following criteria:
Based on the above criteria two 150 µF polymer aluminum
capacitors with a ESR = 12 mΩ each for a effective ESR in
parallel of 6 mΩ was chosen from Panasonic. The part num-
ber is EEF-UE0J101P.
6. Determine Use of Feed-Forward Capacitor
From step 5 the capacitor chosen in ESR is small enough that
we should use a feed-forward capacitor. This is calculated
from:
OUT
ESR
ESR
. A good starting point for ripple ratio is 0.3 but it is ac-
A
min
f
C
min
ESR
= V
Omin
ESR
≥
≥
A
OUT
[5.7 V µs / (12 - 3.3) ] x (1 / 169 µF) = 3.9 mΩ
t
ON
max
f
(15 mV x 1.65 µH x 1) / 5.7 V µs = 4.3 mΩ
ESR
= 70 / (500 kHz
ESR
= 1 with a feed-forward capacitor
min
= (3.3V/12V)/500 kHz = 550 ns
/ 0.6 without a feed-forward capacitor
= (80 mV x 1.65 µH x 1) / 5.7 V µs
≥
max
min
C
[ ET / (V
ESR
Omin
≥
= (80 mV x L x A
(15 mV x L x A
I
rmsco
= 70 / (f
max
IN
= 23 mΩ
2
= 1A
- V
x 1.65 µH) = 169 µF
OUT
s
2
x L)
) ] x (A
f
f
) / ET
) / ET
f
/ C
O
)
15
Let C
7. MOSFET and R
The LM3150 is designed to drive N-channel MOSFETs. For
a maximum input voltage of 24V we should choose N-channel
MOSFETs with a maximum drain-source voltage, V
greater than 1.2 x 24V = 28.8V. FETs with maximum V
30V will be the first option. The combined total gate charge
Q
following:
Where I
temperature range, specified in the electrical characteristics
table. The MOSFET gate charge Q
the V
5V for the high-side, M1, MOSFET and V
side, M2, MOSFET.
The Renesas MOSFET RJK0305DPB has a gate charge of
10 nC at V
gate charge for a high-side, M1, and low-side, M2, MOSFET
12 nC + 10 nC = 22 nC is less than 130 nC calculated
Q
The calculated MOSFET power dissipation must be less than
the max allowed power dissipation, Pdmax, as specified in the
MOSFET datasheet. An approximate calculation of the FET
power dissipated Pd, of the high-side and low-side FET is
given by:
High-Side MOSFET
The max power dissipation of the RJK0305DPB is rated as
45W for a junction temperature that is 125°C higher than the
case temperature and a thermal resistance from the FET
junction to case, θ
onto the PCB, the PCB will have some additional thermal re-
sistance such that the total system thermal resistance of the
FET package and the PCB, θ
C/W for this type of FET package. The max power dissipation,
Pdmax, with the FET mounted onto a PCB with a 125°C junc-
gtotal
gtotal
ff
GS
.
of the high-side and low-side FET should satisfy the
= 270 pF, which is the closest next standard value.
VCCL
vs Q
GS
g
is the minimum current limit of VCC, over the
= 5V, and 12 nC at V
curve of the MOSFET datasheet at the V
Q
JC
LIM
gtotal
, of 2.78°C/W. When the FET is mounted
Q
Selection
Q
gtotal
≤
gtotal
65 mA / 500 kHz
≤
≤
JA
I
, is typically in the range of 30°
130 nC
VCCL
g
/ f
is gathered from reading
GS
s
= 6V. This combined
GS
= 6V for the low-
www.national.com
DS
GS
DS
of
=
,