KSZ8995XA Micrel Inc, KSZ8995XA Datasheet - Page 27

IC SWITCH 10/100 5PORT 128PQFP

KSZ8995XA

Manufacturer Part Number
KSZ8995XA
Description
IC SWITCH 10/100 5PORT 128PQFP
Manufacturer
Micrel Inc
Datasheets

Specifications of KSZ8995XA

Applications
*
Mounting Type
Surface Mount
Package / Case
128-MQFP, 128-PQFP
Number Of Primary Switch Ports
5
Internal Memory Buffer Size
64
Operating Supply Voltage (typ)
1.8/2.5/3.3V
Fiber Support
Yes
Integrated Led Drivers
Yes
Phy/transceiver Interface
MII/SNI
Power Supply Type
Analog/Digital
Package Type
PQFP
Data Rate (typ)
10/100Mbps
Vlan Support
Yes
Operating Temperature (max)
70C
Operating Temperature (min)
0C
Pin Count
128
Mounting
Surface Mount
Jtag Support
No
Operating Temperature Classification
Commercial
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
576-1642 - BOARD EVALUATION FOR KSZ8995XA
Lead Free Status / RoHS Status
Compliant, Lead free / RoHS Compliant
Other names
576-1042

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Once classification of the packets has been determined either by port-based priority, 802.1p tag-based priority or DiffServ
priority, they are placed in either the high or low priority queue on the egress port. The user can enable the egress priority queues
on a per port basis by setting bit 0 of registers 0x10, 0x20, 0x30, 0x40, and 0x50 for ports 1, 2, 3, 4 and 5, respectively. If the
egress priority queue for a given port is not set, the port will treat all packets as if they are the same priority, even though packets
are classified on their ingress ports. If the egress priority queue for a given port is enabled, packets are serviced based on the
user programmable egress policy. The priority scheme selection is set in register 0x05 bits[3-2] as shown in Table 6.
The KS8995XA offers support for port-based, 802.1p tag-based, and IPv4 DiffServ priority, as well as programmable egress
policies. These KS8995XA QoS features enable identifying, classifying and forwarding packets based on their priority. The
system designer is able to use this device to build network elements that give more control over system resources, priority
service to mission critical applications, and can be integrated into the next generation of multimedia networks.
Rate Limit Support
KS8995XA supports hardware rate limiting on “receive” and “transmit” independently on a per port basis. It also supports rate
limiting in a priority or non-priority environment. The rate limit starts from 0Kbps and goes up to the line rate in steps of 32Kbps.
The KS8995XA uses one second as an interval. At the beginning of each interval, the counter is cleared to zero, and the rate
limit mechanism starts to count the number of bytes during this interval.
For receive, if the number of bytes exceeds the programmed limit, the switch will stop receiving packets on the port until the
“one second” interval expires. There is an option provided for flow control to prevent packet loss. If the rate limit is programmed
greater than or equal to 128Kbps and the byte counter is 8K bytes below the limit, the flow control will be triggered. If the rate
limit is programmed lower than 128Kbps and the byte counter is 2K bytes below the limit, the flow control will be triggered.
For transmit, if the number of bytes exceeds the programmed limit, the switch will stop transmitting packets on the port until
the “one second” interval expires.
If priority is enabled, the KS8995XA can support different rate controls for both high priority and low priority packets. This can
be programmed through Registers 21 – 27.
May 2005
KS8995XA
0x05, bit 3
Register
0
0
1
1
0x05, bit 2
Register
DiffServ Field (Binary)
0
1
0
1
000000
000001
000010
000011
000100
111011
111100
111101
111110
111111
Egress Priority Scheme
Always deliver high priority packets first
Deliver high/low priority packets at a ratio of 10/1
Deliver high/low priority packets at a ratio of 5/1
Deliver high/low priority packets at a ratio of 2/1
Table 6. Transmit Priority Ratio
Table 5. DiffServ Code Point
Code Point
DSCP[59]
DSCP[60]
DSCP[61]
DSCP[62]
DSCP[63]
DSCP[0]
DSCP[1]
DSCP[2]
DSCP[3]
DSCP[4]
27
KS8995X (Reg. and Bit)
0x67, bit 0
0x67, bit 1
0x67, bit 2
0x67, bit 3
0x67, bit 4
0x60, bit 3
0x60, bit 4
0x60, bit 5
0x60, bit 6
0x60, bit 7
M9999-051305
Micrel, Inc.

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