IDT72P51749L6BBI8 IDT, Integrated Device Technology Inc, IDT72P51749L6BBI8 Datasheet

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MULTI-QUEUE FLOW-CONTROL DEVICES (128 QUEUES) 36 BIT WIDE CONFIGURATION 1,179,648 bits 2,359,296 bits 4,718,592 bits FEATURES • • • • • Choose from among the following memory density options: ⎯ ⎯ ⎯ ⎯ ⎯ IDT72P51749 Total Available Memory = ...

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IDT72P51749/72P51759/72P51769 1.8V, MULTI-QUEUE FLOW-CONTROL DEVICES (128 QUEUES) 36 BIT WIDE CONFIGURATION 1,179,648, 2,359,296, and 4,718,592 bits Features ........................................................................................................................................................................................................................ 1 Description ................................................................................................................................................................................................................... 5 Pin configuration ......................................................................................................................................................................................................... 7 Detailed description .................................................................................................................................................................................................... 8 Pin descriptions ......................................................................................................................................................................................................... 10 Pin number table ........................................................................................................................................................................................................ 16 Recommended ...

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IDT72P51749/72P51759/72P51769 1.8V, MULTI-QUEUE FLOW-CONTROL DEVICES (128 QUEUES) 36 BIT WIDE CONFIGURATION 1,179,648, 2,359,296, and 4,718,592 bits Figure 1. Multi-Queue Flow-Control Device Block Diagram .............................................................................................................................................. 6 Figure 2a. AC Test Load ................................................................................................................................................................................................ 19 Figure 2b. Lumped Capacitive Load, Typical Derating ................................................................................................................................................... ...

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IDT72P51749/72P51759/72P51769 1.8V, MULTI-QUEUE FLOW-CONTROL DEVICES (128 QUEUES) 36 BIT WIDE CONFIGURATION 1,179,648, 2,359,296, and 4,718,592 bits List of Figures (Continued) Figure 55. Reading in Packet Mode during a Queue change ......................................................................................................................................... 70 Figure 56. Writing Demarcation Bits (Packet Mode) ........................................................................................................................................................ ...

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IDT72P51749/72P51759/72P51769 1.8V, MULTI-QUEUE FLOW-CONTROL DEVICES (128 QUEUES) 36 BIT WIDE CONFIGURATION 1,179,648, 2,359,296, and 4,718,592 bits DESCRIPTION The IDT72P51749/72P51759/72P51769 multi-queue flow-control devices are single chips with up to 128 discrete configurable FIFO queues. All queues within the device have a ...

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IDT72P51749/72P51759/72P51769 1.8V, MULTI-QUEUE FLOW-CONTROL DEVICES (128 QUEUES) 36 BIT WIDE CONFIGURATION 1,179,648, 2,359,296, and 4,718,592 bits WCLK WEN WCS 8 WRADD Write Control Logic WADEN Write Pointers PAF FSTR 8 General Flag PAFn Monitor FSYNC FXO FXI Active Q FF/IR ...

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IDT72P51749/72P51759/72P51769 1.8V, MULTI-QUEUE FLOW-CONTROL DEVICES (128 QUEUES) 36 BIT WIDE CONFIGURATION 1,179,648, 2,359,296, and 4,718,592 bits PIN CONFIGURATION A1 BALL PAD CORNER A D14 D13 D12 D10 B D15 D16 D11 D9 C D17 D18 D19 D8 D D20 D21 ...

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IDT72P51749/72P51759/72P51769 1.8V, MULTI-QUEUE FLOW-CONTROL DEVICES (128 QUEUES) 36 BIT WIDE CONFIGURATION 1,179,648, 2,359,296, and 4,718,592 bits DETAILED DESCRIPTION MULTI-QUEUE STRUCTURE The IDT multi-queue flow-control device has a single data input port and single data output port with up to 128 ...

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IDT72P51749/72P51759/72P51769 1.8V, MULTI-QUEUE FLOW-CONTROL DEVICES (128 QUEUES) 36 BIT WIDE CONFIGURATION 1,179,648, 2,359,296, and 4,718,592 bits (bit 35) constituting the entire packet. A packet can be any length the user desires the total available memory in the multi-queue ...

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IDT72P51749/72P51759/72P51769 1.8V, MULTI-QUEUE FLOW-CONTROL DEVICES (128 QUEUES) 36 BIT WIDE CONFIGURATION 1,179,648, 2,359,296, and 4,718,592 bits PIN DESCRIPTIONS Symbol & Name I/O TYPE (Pin No.) BM [3:0] Bus Matching HSTL-LVTTL These pins define the bus width of the input write ...

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IDT72P51749/72P51759/72P51769 1.8V, MULTI-QUEUE FLOW-CONTROL DEVICES (128 QUEUES) 36 BIT WIDE CONFIGURATION 1,179,648, 2,359,296, and 4,718,592 bits PIN DESCRIPTIONS (CONTINUED) Symbol & Name I/O TYPE Pin No. FF/IR Full Flag/ HSTL-LVTTL This pin provides the full flag output for the active ...

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IDT72P51749/72P51759/72P51769 1.8V, MULTI-QUEUE FLOW-CONTROL DEVICES (128 QUEUES) 36 BIT WIDE CONFIGURATION 1,179,648, 2,359,296, and 4,718,592 bits PIN DESCRIPTIONS (CONTINUED) Symbol & Name I/O TYPE Pin No. IOSEL IO Select LVTTL (C8) INPUT MAST (1) Master Device HSTL-LVTTL The state of ...

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IDT72P51749/72P51759/72P51769 1.8V, MULTI-QUEUE FLOW-CONTROL DEVICES (128 QUEUES) 36 BIT WIDE CONFIGURATION 1,179,648, 2,359,296, and 4,718,592 bits PIN DESCRIPTIONS (CONTINUED) Symbol & Name I/O TYPE Pin No. PR Packet Ready HSTL-LVTTL If packet mode has been selected this flag output provides ...

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IDT72P51749/72P51759/72P51769 1.8V, MULTI-QUEUE FLOW-CONTROL DEVICES (128 QUEUES) 36 BIT WIDE CONFIGURATION 1,179,648, 2,359,296, and 4,718,592 bits PIN DESCRIPTIONS (CONTINUED) Symbol & Name I/O TYPE (Pin No.) SCLK Serial Clock HSTL-LVTTL If serial programming of the multi-queue device has been selected ...

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IDT72P51749/72P51759/72P51769 1.8V, MULTI-QUEUE FLOW-CONTROL DEVICES (128 QUEUES) 36 BIT WIDE CONFIGURATION 1,179,648, 2,359,296, and 4,718,592 bits PIN DESCRIPTIONS (CONTINUED) Symbol & Name I/O TYPE Pin No. WADEN Write Address HSTL-LVTTL that a write queue selection cannot be made, (WADEN must ...

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IDT72P51749/72P51759/72P51769 1.8V, MULTI-QUEUE FLOW-CONTROL DEVICES (128 QUEUES) 36 BIT WIDE CONFIGURATION 1,179,648, 2,359,296, and 4,718,592 bits PIN NUMBER TABLE Symbol Name I/O TYPE D[35:0] Data Input Bus HSTL-LVTTL D35-J3, D(34-32)-H(3-1), D(31-29)-G(3-1), D(28-26)-F(3-1), D(25-23)-E(3-1), D(22-20)-D(3-1), Din INPUT Q[35:0] Data Output Bus ...

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IDT72P51749/72P51759/72P51769 1.8V, MULTI-QUEUE FLOW-CONTROL DEVICES (128 QUEUES) 36 BIT WIDE CONFIGURATION 1,179,648, 2,359,296, and 4,718,592 bits ABSOLUTE MAXIMUM RATINGS Symbol Rating V Terminal Voltage TERM with respect to GND T Storage Temperature STG I DC Output Current OUT NOTES: 1. ...

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IDT72P51749/72P51759/72P51769 1.8V, MULTI-QUEUE FLOW-CONTROL DEVICES (128 QUEUES) 36 BIT WIDE CONFIGURATION 1,179,648, 2,359,296, and 4,718,592 bits DC ELECTRICAL CHARACTERISTICS (Commercial 1.8V ± 0.10V 0°C to +70°C;Industrial Symbol Parameter I Input Leakage Current LI ...

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IDT72P51749/72P51759/72P51769 1.8V, MULTI-QUEUE FLOW-CONTROL DEVICES (128 QUEUES) 36 BIT WIDE CONFIGURATION 1,179,648, 2,359,296, and 4,718,592 bits HSTL 1.5V AC TEST CONDITIONS Input Pulse Levels Input Rise/Fall Times Input Timing Reference Levels Output Reference Levels NOTE 1.5V ± ...

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IDT72P51749/72P51759/72P51769 1.8V, MULTI-QUEUE FLOW-CONTROL DEVICES (128 QUEUES) 36 BIT WIDE CONFIGURATION 1,179,648, 2,359,296, and 4,718,592 bits AC ELECTRICAL CHARACTERISTICS (Commercial 1.8V ± 0.10V 0°C to +70°C;Industrial Symbol Parameter f Clock Cycle Frequency (WCLK ...

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IDT72P51749/72P51759/72P51769 1.8V, MULTI-QUEUE FLOW-CONTROL DEVICES (128 QUEUES) 36 BIT WIDE CONFIGURATION 1,179,648, 2,359,296, and 4,718,592 bits AC ELECTRICAL CHARACTERISTICS (CONTINUED) (Commercial 1.8V ± 0.10V 0°C to +70°C;Industrial Symbol Parameter WCLK to PAF Flag ...

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IDT72P51749/72P51759/72P51769 1.8V, MULTI-QUEUE FLOW-CONTROL DEVICES (128 QUEUES) 36 BIT WIDE CONFIGURATION 1,179,648, 2,359,296, and 4,718,592 bits FUNCTIONAL DESCRIPTION MASTER RESET A Master Reset is performed by toggling the MRS input from HIGH to LOW to HIGH. During a master reset ...

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IDT72P51749/72P51759/72P51769 1.8V, MULTI-QUEUE FLOW-CONTROL DEVICES (128 QUEUES) 36 BIT WIDE CONFIGURATION 1,179,648, 2,359,296, and 4,718,592 bits SERIAL PROGRAMMING The multi-queue flow-control device is a fully programmable device, provid- ing the user with flexibility in how queues are configured in terms ...

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IDT72P51749/72P51759/72P51769 1.8V, MULTI-QUEUE FLOW-CONTROL DEVICES (128 QUEUES) 36 BIT WIDE CONFIGURATION 1,179,648, 2,359,296, and 4,718,592 bits When Multi-Queue devices are connected in an Expansion Configuration, the SENI signal of the first device in a chain must be held LOW. The ...

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IDT72P51749/72P51759/72P51769 1.8V, MULTI-QUEUE FLOW-CONTROL DEVICES (128 QUEUES) 36 BIT WIDE CONFIGURATION 1,179,648, 2,359,296, and 4,718,592 bits QUEUE DESCRIPTION CONFIGURATION OF THE IDT MULTI-QUEUE FLOW-CONTROL DEVICE The IDT72P51749/72P51759/72P51769 multi-queue flow-control devices can be configured in distinct modes, namely Packet mode, FIFO ...

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IDT72P51749/72P51759/72P51769 1.8V, MULTI-QUEUE FLOW-CONTROL DEVICES (128 QUEUES) 36 BIT WIDE CONFIGURATION 1,179,648, 2,359,296, and 4,718,592 bits STANDARD MODE OPERATION WRITE QUEUE SELECTION AND WRITE OPERATION (STANDARD MODE) The IDT72P51749/72P51759/72P51769 multi-queue flow-control devices can be configured maximum of ...

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IDT72P51749/72P51759/72P51769 1.8V, MULTI-QUEUE FLOW-CONTROL DEVICES (128 QUEUES) 36 BIT WIDE CONFIGURATION 1,179,648, 2,359,296, and 4,718,592 bits READ QUEUE SELECTION AND READ OPERATION (STANDARD MODE) The IDT72P51749/72P51759/72P51769 multi-queue flow-control devices can be configured maximum of 128 queues which ...

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IDT72P51749/72P51759/72P51769 1.8V, MULTI-QUEUE FLOW-CONTROL DEVICES (128 QUEUES) 36 BIT WIDE CONFIGURATION 1,179,648, 2,359,296, and 4,718,592 bits PACKET MODE OPERATION The Packet mode operation provides the capability where, user defined packets or frames can be written to the device as opposed ...

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IDT72P51749/72P51759/72P51769 1.8V, MULTI-QUEUE FLOW-CONTROL DEVICES (128 QUEUES) 36 BIT WIDE CONFIGURATION 1,179,648, 2,359,296, and 4,718,592 bits SWITCHING QUEUES ON THE WRITE PORT The IDT72P51749/72P51759/72P51769 multi-queue flow-control devices can be configured maximum of 128 queues. Data is written ...

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IDT72P51749/72P51759/72P51769 1.8V, MULTI-QUEUE FLOW-CONTROL DEVICES (128 QUEUES) 36 BIT WIDE CONFIGURATION 1,179,648, 2,359,296, and 4,718,592 bits The IDT72P51749/72P51759/72P51769 multi-queue flow-control device supports writing and reading from either the same queue of from different queues. The device also supports simultaneous queue ...

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IDT72P51749/72P51759/72P51769 1.8V, MULTI-QUEUE FLOW-CONTROL DEVICES (128 QUEUES) 36 BIT WIDE CONFIGURATION 1,179,648, 2,359,296, and 4,718,592 bits SWITCHING QUEUES ON THE READ PORT The IDT72P51749/72P51759/72P51769 multi-queue flow-control devices can be configured maximum of 128 queues. Data is read ...

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IDT72P51749/72P51759/72P51769 1.8V, MULTI-QUEUE FLOW-CONTROL DEVICES (128 QUEUES) 36 BIT WIDE CONFIGURATION 1,179,648, 2,359,296, and 4,718,592 bits SIMULTANEOUS QUEUE SWITCHING The IDT72P51749/72P51759/72P51769 multi-queue flow-control device supports reading and writing from either the same queue of from different queues. The device also ...

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IDT72P51749/72P51759/72P51769 1.8V, MULTI-QUEUE FLOW-CONTROL DEVICES (128 QUEUES) 36 BIT WIDE CONFIGURATION 1,179,648, 2,359,296, and 4,718,592 bits QUEUE MARKing The overall intent of the MARK function is to provide the ability to either re- write and/or re-read information that is stored ...

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IDT72P51749/72P51759/72P51769 1.8V, MULTI-QUEUE FLOW-CONTROL DEVICES (128 QUEUES) 36 BIT WIDE CONFIGURATION 1,179,648, 2,359,296, and 4,718,592 bits Write Queue MARK WCLK WADEN WADEN Figure 15. MARKing a Queue in Packet Mode - Write Queue MARK Read Queue MARK ...

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IDT72P51749/72P51759/72P51769 1.8V, MULTI-QUEUE FLOW-CONTROL DEVICES (128 QUEUES) 36 BIT WIDE CONFIGURATION 1,179,648, 2,359,296, and 4,718,592 bits Write Queue UN-MARK WCLK WADEN WADEN Figure 17. UN-MARKing a Queue in Packet Mode - Write Queue UN-MARK Read Queue UN-MARK ...

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IDT72P51749/72P51759/72P51769 1.8V, MULTI-QUEUE FLOW-CONTROL DEVICES (128 QUEUES) 36 BIT WIDE CONFIGURATION 1,179,648, 2,359,296, and 4,718,592 bits MARK OPERATIONAL NOTES: IN PACKET MODE Write Port - MARKing a location can only occur during a Queue switch cycle - There is only ...

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IDT72P51749/72P51759/72P51769 1.8V, MULTI-QUEUE FLOW-CONTROL DEVICES (128 QUEUES) 36 BIT WIDE CONFIGURATION 1,179,648, 2,359,296, and 4,718,592 bits Write Queue MARK WCLK WADEN WADEN Figure 19. MARKing a Queue in FIFO Mode - Write Queue MARK Read Queue MARK ...

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IDT72P51749/72P51759/72P51769 1.8V, MULTI-QUEUE FLOW-CONTROL DEVICES (128 QUEUES) 36 BIT WIDE CONFIGURATION 1,179,648, 2,359,296, and 4,718,592 bits Un-MARKing a Queue UN-MARKing a Queue in FIFO Mode Write Queue UN-MARK WCLK WADEN WADEN A 1 Figure 21. UN-MARKing a Queue in FIFO ...

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IDT72P51749/72P51759/72P51769 1.8V, MULTI-QUEUE FLOW-CONTROL DEVICES (128 QUEUES) 36 BIT WIDE CONFIGURATION 1,179,648, 2,359,296, and 4,718,592 bits Leaving a MARK Active During a Queue switch the value of WEN for the write port and REN for the read port determines whether ...

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IDT72P51749/72P51759/72P51769 1.8V, MULTI-QUEUE FLOW-CONTROL DEVICES (128 QUEUES) 36 BIT WIDE CONFIGURATION 1,179,648, 2,359,296, and 4,718,592 bits Inactivating a MARK During a Queue switch the value of WEN for the write port and REN for the read port determines whether the ...

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IDT72P51749/72P51759/72P51769 1.8V, MULTI-QUEUE FLOW-CONTROL DEVICES (128 QUEUES) 36 BIT WIDE CONFIGURATION 1,179,648, 2,359,296, and 4,718,592 bits Write Cycle Action (active LOW) NO Operation Selects a Queue NO Operation NO Operation Read Cycle Action (active LOW) NO Operation Selects a Queue ...

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IDT72P51749/72P51759/72P51769 1.8V, MULTI-QUEUE FLOW-CONTROL DEVICES (128 QUEUES) 36 BIT WIDE CONFIGURATION 1,179,648, 2,359,296, and 4,718,592 bits FLAG DESCRIPTION PAFn FLAG BUS OPERATION The IDT72P51749/72P51759/72P51769 multi-queue flow-control device can be configured for up to 128 queues, each queue having its own ...

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IDT72P51749/72P51759/72P51769 1.8V, MULTI-QUEUE FLOW-CONTROL DEVICES (128 QUEUES) 36 BIT WIDE CONFIGURATION 1,179,648, 2,359,296, and 4,718,592 bits is only pertinent to the queue being selected for read operations at that time. Remember, that when in expansion configuration only one multi-queue device ...

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IDT72P51749/72P51759/72P51769 1.8V, MULTI-QUEUE FLOW-CONTROL DEVICES (128 QUEUES) 36 BIT WIDE CONFIGURATION 1,179,648, 2,359,296, and 4,718,592 bits write port may experience a change of its internal almost empty flag status based on write operations. The multi-queue flow-control device also provides a ...

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IDT72P51749/72P51759/72P51769 1.8V, MULTI-QUEUE FLOW-CONTROL DEVICES (128 QUEUES) 36 BIT WIDE CONFIGURATION 1,179,648, 2,359,296, and 4,718,592 bits TABLE 9 — FLAG OPERATION BOUNDARIES & TIMING Output Ready, EF Flag Boundary EF Boundary Condition I/O Set-Up EF Goes LOW after Last Read ...

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IDT72P51749/72P51759/72P51769 1.8V, MULTI-QUEUE FLOW-CONTROL DEVICES (128 QUEUES) 36 BIT WIDE CONFIGURATION 1,179,648, 2,359,296, and 4,718,592 bits TABLE 9 — FLAG OPERATION BOUNDARIES & TIMING (CONTINUED) Programmable Almost Empty Flag, PAE Boundary I/O Set-Up in36 to out36 (Both ports selected for ...

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IDT72P51749/72P51759/72P51769 1.8V, MULTI-QUEUE FLOW-CONTROL DEVICES (128 QUEUES) 36 BIT WIDE CONFIGURATION 1,179,648, 2,359,296, and 4,718,592 bits address the third status word, Queue[16:23], the RDADD address is “xxxx0010”. PAE[0:7] gets status of queues, Queue[16:23] respectively. To address the fourth status word, ...

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IDT72P51749/72P51759/72P51769 1.8V, MULTI-QUEUE FLOW-CONTROL DEVICES (128 QUEUES) 36 BIT WIDE CONFIGURATION 1,179,648, 2,359,296, and 4,718,592 bits the PR flag will again gone active, then reads from the new packet may follow after the current packet has been completely read out. ...

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IDT72P51749/72P51759/72P51769 1.8V, MULTI-QUEUE FLOW-CONTROL DEVICES (128 QUEUES) 36 BIT WIDE CONFIGURATION 1,179,648, 2,359,296, and 4,718,592 bits PACKET MODE DEMARCATION BITS The IDT72P51749/72P51759/72P51769 can be configured for packet mode operation. In packet mode the IDT72P51749/72P51759/72P51769 provides the functionality to demarcate packets ...

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IDT72P51749/72P51759/72P51769 1.8V, MULTI-QUEUE FLOW-CONTROL DEVICES (128 QUEUES) 36 BIT WIDE CONFIGURATION 1,179,648, 2,359,296, and 4,718,592 bits NOTES 18bit word to 36 bit word configuration two (2) eighteen bit words are concatenated to form ...

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IDT72P51749/72P51759/72P51769 1.8V, MULTI-QUEUE FLOW-CONTROL DEVICES (128 QUEUES) 36 BIT WIDE CONFIGURATION 1,179,648, 2,359,296, and 4,718,592 bits NOTES bit word to 36 bit word configuration four (4), nine bit words are concatenated to ...

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IDT72P51749/72P51759/72P51769 1.8V, MULTI-QUEUE FLOW-CONTROL DEVICES (128 QUEUES) 36 BIT WIDE CONFIGURATION 1,179,648, 2,359,296, and 4,718,592 bits BUS MATCHING OPERATION Bus Matching operation between the input port and output port is available. During a master reset of the multi-queue the state ...

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IDT72P51749/72P51759/72P51769 1.8V, MULTI-QUEUE FLOW-CONTROL DEVICES (128 QUEUES) 36 BIT WIDE CONFIGURATION 1,179,648, 2,359,296, and 4,718,592 bits BYTE ORDER ON INPUT PORT: BYTE ORDER ON OUTPUT PORT BYTE ORDER ON INPUT PORT: BYTE ORDER ON ...

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IDT72P51749/72P51759/72P51769 1.8V, MULTI-QUEUE FLOW-CONTROL DEVICES (128 QUEUES) 36 BIT WIDE CONFIGURATION 1,179,648, 2,359,296, and 4,718,592 bits MRS t RSS WEN REN t RSS SENI t RSS FSTR, ESTR t RSS WADEN, RADEN t RSS ID0, ID1, ID2 t RSS BM ...

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IDT72P51749/72P51759/72P51769 1.8V, MULTI-QUEUE FLOW-CONTROL DEVICES (128 QUEUES) 36 BIT WIDE CONFIGURATION 1,179,648, 2,359,296, and 4,718,592 bits COMMERCIAL AND INDUSTRIAL 55 TEMPERATURE RANGES FEBRUARY 10, 2009 ...

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IDT72P51749/72P51759/72P51769 1.8V, MULTI-QUEUE FLOW-CONTROL DEVICES (128 QUEUES) 36 BIT WIDE CONFIGURATION 1,179,648, 2,359,296, and 4,718,592 bits COMMERCIAL AND INDUSTRIAL 56 TEMPERATURE RANGES FEBRUARY 10, 2009 ...

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IDT72P51749/72P51759/72P51769 1.8V, MULTI-QUEUE FLOW-CONTROL DEVICES (128 QUEUES) 36 BIT WIDE CONFIGURATION 1,179,648, 2,359,296, and 4,718,592 bits WCLK WADEN WEN WRADD Qx FF PAF Active Bus PAF-Qx RCLK REN ...

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IDT72P51749/72P51759/72P51769 1.8V, MULTI-QUEUE FLOW-CONTROL DEVICES (128 QUEUES) 36 BIT WIDE CONFIGURATION 1,179,648, 2,359,296, and 4,718,592 bits COMMERCIAL AND INDUSTRIAL 58 TEMPERATURE RANGES FEBRUARY 10, 2009 ...

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IDT72P51749/72P51759/72P51769 1.8V, MULTI-QUEUE FLOW-CONTROL DEVICES (128 QUEUES) 36 BIT WIDE CONFIGURATION 1,179,648, 2,359,296, and 4,718,592 bits COMMERCIAL AND INDUSTRIAL 59 TEMPERATURE RANGES FEBRUARY 10, 2009 ...

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IDT72P51749/72P51759/72P51769 1.8V, MULTI-QUEUE FLOW-CONTROL DEVICES (128 QUEUES) 36 BIT WIDE CONFIGURATION 1,179,648, 2,359,296, and 4,718,592 bits COMMERCIAL AND INDUSTRIAL 60 TEMPERATURE RANGES FEBRUARY 10, 2009 ...

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IDT72P51749/72P51759/72P51769 1.8V, MULTI-QUEUE FLOW-CONTROL DEVICES (128 QUEUES) 36 BIT WIDE CONFIGURATION 1,179,648, 2,359,296, and 4,718,592 bits WCLK t ENS WEN RCLK REN Qout Last Word Read Out of Queue OR NOTES has ...

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IDT72P51749/72P51759/72P51769 1.8V, MULTI-QUEUE FLOW-CONTROL DEVICES (128 QUEUES) 36 BIT WIDE CONFIGURATION 1,179,648, 2,359,296, and 4,718,592 bits COMMERCIAL AND INDUSTRIAL 62 TEMPERATURE RANGES FEBRUARY 10, 2009 ...

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IDT72P51749/72P51759/72P51769 1.8V, MULTI-QUEUE FLOW-CONTROL DEVICES (128 QUEUES) 36 BIT WIDE CONFIGURATION 1,179,648, 2,359,296, and 4,718,592 bits COMMERCIAL AND INDUSTRIAL 63 TEMPERATURE RANGES FEBRUARY 10, 2009 ...

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IDT72P51749/72P51759/72P51769 1.8V, MULTI-QUEUE FLOW-CONTROL DEVICES (128 QUEUES) 36 BIT WIDE CONFIGURATION 1,179,648, 2,359,296, and 4,718,592 bits COMMERCIAL AND INDUSTRIAL 64 TEMPERATURE RANGES FEBRUARY 10, 2009 ...

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IDT72P51749/72P51759/72P51769 1.8V, MULTI-QUEUE FLOW-CONTROL DEVICES (128 QUEUES) 36 BIT WIDE CONFIGURATION 1,179,648, 2,359,296, and 4,718,592 bits COMMERCIAL AND INDUSTRIAL 65 TEMPERATURE RANGES FEBRUARY 10, 2009 ...

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IDT72P51749/72P51759/72P51769 1.8V, MULTI-QUEUE FLOW-CONTROL DEVICES (128 QUEUES) 36 BIT WIDE CONFIGURATION 1,179,648, 2,359,296, and 4,718,592 bits *A* *B* *C* RCLK t ENS REN RDADD RADEN Qout WCLK ...

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IDT72P51749/72P51759/72P51769 1.8V, MULTI-QUEUE FLOW-CONTROL DEVICES (128 QUEUES) 36 BIT WIDE CONFIGURATION 1,179,648, 2,359,296, and 4,718,592 bits COMMERCIAL AND INDUSTRIAL 67 TEMPERATURE RANGES FEBRUARY 10, 2009 ...

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IDT72P51749/72P51759/72P51769 1.8V, MULTI-QUEUE FLOW-CONTROL DEVICES (128 QUEUES) 36 BIT WIDE CONFIGURATION 1,179,648, 2,359,296, and 4,718,592 bits COMMERCIAL AND INDUSTRIAL 68 TEMPERATURE RANGES FEBRUARY 10, 2009 ...

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IDT72P51749/72P51759/72P51769 1.8V, MULTI-QUEUE FLOW-CONTROL DEVICES (128 QUEUES) 36 BIT WIDE CONFIGURATION 1,179,648, 2,359,296, and 4,718,592 bits COMMERCIAL AND INDUSTRIAL 69 TEMPERATURE RANGES FEBRUARY 10, 2009 ...

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IDT72P51749/72P51759/72P51769 1.8V, MULTI-QUEUE FLOW-CONTROL DEVICES (128 QUEUES) 36 BIT WIDE CONFIGURATION 1,179,648, 2,359,296, and 4,718,592 bits COMMERCIAL AND INDUSTRIAL 70 TEMPERATURE RANGES FEBRUARY 10, 2009 ...

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IDT72P51749/72P51759/72P51769 1.8V, MULTI-QUEUE FLOW-CONTROL DEVICES (128 QUEUES) 36 BIT WIDE CONFIGURATION 1,179,648, 2,359,296, and 4,718,592 bits COMMERCIAL AND INDUSTRIAL 71 TEMPERATURE RANGES FEBRUARY 10, 2009 ...

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IDT72P51749/72P51759/72P51769 1.8V, MULTI-QUEUE FLOW-CONTROL DEVICES (128 QUEUES) 36 BIT WIDE CONFIGURATION 1,179,648, 2,359,296, and 4,718,592 bits COMMERCIAL AND INDUSTRIAL 72 TEMPERATURE RANGES FEBRUARY 10, 2009 ...

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IDT72P51749/72P51759/72P51769 1.8V, MULTI-QUEUE FLOW-CONTROL DEVICES (128 QUEUES) 36 BIT WIDE CONFIGURATION 1,179,648, 2,359,296, and 4,718,592 bits *A* *B* *C* WCLK WEN WRADD WADEN Din PAF HIGH-Z (Device 1) ...

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IDT72P51749/72P51759/72P51769 1.8V, MULTI-QUEUE FLOW-CONTROL DEVICES (128 QUEUES) 36 BIT WIDE CONFIGURATION 1,179,648, 2,359,296, and 4,718,592 bits *A* *B* RCLK REN RDADD RADEN HIGH-Z Qout PAE HIGH-Z (Device 1) ...

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IDT72P51749/72P51759/72P51769 1.8V, MULTI-QUEUE FLOW-CONTROL DEVICES (128 QUEUES) 36 BIT WIDE CONFIGURATION 1,179,648, 2,359,296, and 4,718,592 bits RCLK Device 1 Status Word 2 RDADD 001xxx10 t t STS STH ESTR PAEn/ PRn t t ENS ENH RADEN ...

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IDT72P51749/72P51759/72P51769 1.8V, MULTI-QUEUE FLOW-CONTROL DEVICES (128 QUEUES) 36 BIT WIDE CONFIGURATION 1,179,648, 2,359,296, and 4,718,592 bits *A* *B* 1 WCLK WADEN FSTR t ENS WEN WRADD D5Q24 101 11000 t DS Wp+1 ...

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IDT72P51749/72P51759/72P51769 1.8V, MULTI-QUEUE FLOW-CONTROL DEVICES (128 QUEUES) 36 BIT WIDE CONFIGURATION 1,179,648, 2,359,296, and 4,718,592 bits *A* *B* RCLK RADEN ESTR REN RDADD D0Q31 000 11111 OE t OLZ Qout W X ...

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IDT72P51749/72P51759/72P51769 1.8V, MULTI-QUEUE FLOW-CONTROL DEVICES (128 QUEUES) 36 BIT WIDE CONFIGURATION 1,179,648, 2,359,296, and 4,718,592 bits COMMERCIAL AND INDUSTRIAL 78 TEMPERATURE RANGES FEBRUARY 10, 2009 ...

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IDT72P51749/72P51759/72P51769 1.8V, MULTI-QUEUE FLOW-CONTROL DEVICES (128 QUEUES) 36 BIT WIDE CONFIGURATION 1,179,648, 2,359,296, and 4,718,592 bits GND VCC GND GND NOTE: 1. ID2 MUST be unique between the devices. Figure 67. Connecting two 4M MQ 128Q devices in Expansion Mode ...

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IDT72P51749/72P51759/72P51769 1.8V, MULTI-QUEUE FLOW-CONTROL DEVICES (128 QUEUES) 36 BIT WIDE CONFIGURATION 1,179,648, 2,359,296, and 4,718,592 bits Figure 68. Connecting Three or more 4M MQ 128Q in Expansion mode using WRADD bit 7 / RDADD bit 7 SENI SI FXI EXI ...

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IDT72P51749/72P51759/72P51769 1.8V, MULTI-QUEUE FLOW-CONTROL DEVICES (128 QUEUES) 36 BIT WIDE CONFIGURATION 1,179,648, 2,359,296, and 4,718,592 bits JTAG INTERFACE Five additional pins (TDI, TDO, TMS, TCK and TRST) are provided to support the JTAG boundary scan interface. The IDT72P51749/72P51759/ 72P51769 incorporates ...

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IDT72P51749/72P51759/72P51769 1.8V, MULTI-QUEUE FLOW-CONTROL DEVICES (128 QUEUES) 36 BIT WIDE CONFIGURATION 1,179,648, 2,359,296, and 4,718,592 bits 1 0 Input = TMS NOTES: 1. Five consecutive TCK cycles with TMS = 1 will reset the TAP. 2. TAP controller does not ...

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IDT72P51749/72P51759/72P51769 1.8V, MULTI-QUEUE FLOW-CONTROL DEVICES (128 QUEUES) 36 BIT WIDE CONFIGURATION 1,179,648, 2,359,296, and 4,718,592 bits THE INSTRUCTION REGISTER The Instruction register allows an instruction to be shifted in serially into the processor at the rising edge of TCLK. The ...

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IDT72P51749/72P51759/72P51769 1.8V, MULTI-QUEUE FLOW-CONTROL DEVICES (128 QUEUES) 36 BIT WIDE CONFIGURATION 1,179,648, 2,359,296, and 4,718,592 bits HIGH-IMPEDANCE The optional High-Impedance instruction sets all outputs (including two-state as well as three-state types disabled (high-impedance) state and ...

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IDT72P51749/72P51759/72P51769 1.8V, MULTI-QUEUE FLOW-CONTROL DEVICES (128 QUEUES) 36 BIT WIDE CONFIGURATION 1,179,648, 2,359,296, and 4,718,592 bits t 1 TCK t 3 TDI/ TMS t TDO t 6 TRST t 5 SYSTEM INTERFACE PARAMETERS Parameter Symbol Test Conditions Data Output t ...

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ORDERING INFORMATION XXXXX Device Type Power Speed Package NOTES: 1. Industrial temperature range product for the 6ns is available as a standard device. All other speed grades available by special order. 2. Green parts are available. For ...