IDT72T6360L6BB IDT, Integrated Device Technology Inc, IDT72T6360L6BB Datasheet - Page 30

• Manufacturer Part Number: IDT72T6360L6BB
• Description: IC FLOW-CTRL 36BIT 6NS 324-BGA
• Manufacturer: IDT, Integrated Device Technology Inc

Specifications of IDT72T6360L6BB

• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: 72T6360L6BB

AC ELECTRICAL CHARACTERISTICS
(Commercial: V
NOTES:
1. All AC timings apply to both Standard IDT mode and First Word Fall Through mode.
2. Industrial temperature range product for the 7.5ns speed grade is available as a standard device. All other speed grades are available by special order.
IDT72T6360 2.5V, SEQUENTIAL FLOW-CONTROL DEVICE
x9, x18, x36 BIT WIDE CONFIGURATION
Symbol
f
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
f
t
t
t
f
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
f
f
t
t
t
t
t
t
S
A
CLK
CLKH
DS
DH
ENH
RS
RSU
RSH
PL
MC
MCYC
MCKH
MCKL
SC
SDH
SENH
WCSH
C1
C2
CK1
CK2
CKH1
CKH2
CLKL
ENS
RSF
OHZ
OE
SCLK
SCLKH
SCLKL
SDS
SENS
ASO
WFFs
REFs
PAFs
PAEs
SKEW1
SKEW2
WCSS
CKL1
CKL2
Synchronous Clock Cycle Frequency
Data Access Time
Clock Cycle Time
Clock High Time
Clock Low Time
Data Setup Time
Data Hold Time
Enable Setup Time
Enable Hold Time
Reset Pulse Width
Reset Setup Time
Reset Hold Time
Reset to PLL Lock
Reset to Flag and Output
Output enable to High-Z
Output Enable Valid
Master Clock Cycle Frequency
Master Clock Cycle Time
Master Clock Cycle HIGH
Master Clock Cycle LOW
Serial Clock Cycle Frequency
Serial Clock Cycle
Serial Clock HIGH
Serial Clock LOW
Serial Data Setup
Serial Data Hold
Serial Enable Setup
Serial Enable Hold
Serial Output Data Access Time
Write Clock to Synchronous FF/IR
Read Clock to Synchronous EF/OR
WCLK to Synchronous PAF
RCLK to Synchronous PAE
Skew time between RCLK and WCLK for EF/OR and FF/IR in SDR
Skew time between RCLK and WCLK for PAE/PAF
WCS Setup Time
WCS Hold Time
Memory Clock Cycle Frequency at 166MHz
Memory Clock Cycle Frequency at 133MHz
Memory Clock Cycle Time at 166MHz
Memory Clock Cycle Time at 133MHz
Memory Clock Cycle HIGH at 166MHz
Memory Clock Cycle HIGH at 133MHz
Memory Clock Cycle LOW at 166MHz
Memory Clock Cycle LOW at 133MHz
CC
= 2.5V ± 5%, T
Parameter
A
= 0°C to +70°C;Industrial: V
CC
= 2.5V ± 5%, T
(1)
⎯ SYNCHRONOUS TIMING
30
Min.
29.4
0.45
0.45
0.45
0.45
0.45
0.45
100
160
128
2.7
2.7
0.5
0.5
0.5
6.2
7.8
—
10
15
10
20
—
32
—
45
45
15
—
—
—
—
—
1
6
2
2
1
1
5
5
5
4
5
2
IDT72T6360L6
Commercial
A
= -40°C to +85°C)
Max.
31.3
0.55
0.55
0.55
0.55
0.55
0.55
166
170
136
5.9
7.3
—
—
—
—
—
—
—
—
—
—
—
15
34
10
—
—
—
—
—
—
—
20
—
—
—
—
4
4
4
4
4
4
4
Min.
29.4
0.45
0.45
0.45
0.45
100
128
7.5
3.5
3.5
2.5
0.5
2.5
0.5
2.5
0.5
7.8
IDT72T6360L7-5
—
10
15
10
20
—
32
—
45
45
15
—
—
—
—
—
—
—
—
—
1
1
1
5
5
5
5
7
Com'l & Ind'l
COMMERCIAL AND INDUSTRIAL
31.3
0.55
0.55
0.55
0.55
133
136
Max.
7.3
—
—
—
—
—
—
—
—
—
—
—
15
34
10
—
—
—
—
—
—
—
20
—
—
—
—
—
—
—
—
5
5
5
5
5
5
5
(2)
TEMPERATURE RANGES
FEBRUARY 10, 2009
t
t
MHz
MHz
MHz
MHz
MHz
Unit
MCYC
MCYC
t
t
t
t
µs
CK1
CK2
CK1
CK2
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns