KS8695X Micrel Inc, KS8695X Datasheet - Page 26

• Manufacturer Part Number: KS8695X
• Description: IC SWITCH 10/100 5PORT 208PQFP
• Manufacturer: Micrel Inc

Specifications of KS8695X

• Applications: *
• Mounting Type: Surface Mount
• Package / Case: 208-MQFP, 208-PQFP
• For Use With: KS8695-EVAL - EVAL KIT EXPERIMENTAL KS8695576-1005 - BOARD EVAL EXPERIMENT KS8695X
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

KS8695X
Address Map and Register Description
Memory Map
Upon power up, the KS8695X memory map is configured as shown below.
Memory Map Example
The default base address for the KS8695X system configuration registers is 0x03ff0000. After power up, the user is free to
remap the memory for their specific application. The following is an example of the memory space remapped for operation.
Register Description
The KS8695X system configuration registers (SCRs) are located in a block of 64KB in the host memory address space. After
power up and initialization, the user can remap the SCRs to a desired offset. The SCRs are 32 bits wide. They are 32 bit word-
aligned and must be accessed using word instructions. A description of the KS8695X system configuration registers follows.
For bit definitions, please see the detailed "Register Description" section.
M9999-102604
Address
System Registers
0x0000
0x0004
Memory Controller Interface Registers
0x4000
0x4004
0x4008
0x4010
0x4014
0x4020
0x4030
0x4034
0x4038
0x403C
0x4040
0x03FF0000-0x03FFFFFF
0x02000000-0x03FEFFFF
0x03FF0000-0x03FFFFFF
0x02900000-0x03FEFFFF
0x00000000-0x01FFFFFF
0x02100000-0x028FFFFF
0x00100000-0x020FFFFF
0x00000000-0x0007FFFF
Address Range
Address Range
Region
64KB
32MB
32MB
Region
64KB
23MB
8MB
32MB
512KB
Description
System Configuration Register
System Clock and Bus Control Register
External I/O Access Control Register 0
External I/O Access Control Register 1
External I/O Access Control Register 2
ROM/SRAM/FLASH Control Register 0
ROM/SRAM/FLASH Control Register 1
ROM/SRAM/FLASH General Register
SDRAM Control Register 0
SDRAM Control Register 1
SDRAM General Control Register
SDRAM Buffer Control Register
SDRAM Refresh Timer Register
Description
KS8695X System Configuration Register Space
Description
KS8695X System Configuration Register Space
Spare (External I/O)
FLASH
Not Configured
Flash Bank 0
SDRAM
SRAM
26
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Mode
R/W
R/W
R/W
R/W
R/W
[31:0]
[31:0]
[31:0]
[31:0]
[31:0]
[31:0]
[31:0]
[31:0]
Size
[31:0]
[31:0]
[31:0]
[31:0]
[31:0]
October 2004
Micrel