AD9216-105PCBZ Analog Devices Inc, AD9216-105PCBZ Datasheet - Page 25

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AD9216-105PCBZ

Manufacturer Part Number
AD9216-105PCBZ
Description
BOARD EVAL FOR AD9216 105MSPS
Manufacturer
Analog Devices Inc
Datasheet

Specifications of AD9216-105PCBZ

Number Of Adc's
2
Number Of Bits
10
Sampling Rate (per Second)
105M
Data Interface
Parallel
Inputs Per Adc
2 Differential
Input Range
2 Vpp
Power (typ) @ Conditions
300mW @ 105MSPS
Voltage Supply Source
Single Supply
Operating Temperature
-40°C ~ 85°C
Utilized Ic / Part
AD9216-105
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
External Reference Operation
The use of an external reference may be necessary to enhance
the gain accuracy of the ADC or to improve the thermal drift
characteristics. When multiple ADCs track one another, a single
reference (internal or external) may be necessary to reduce gain
matching errors to an acceptable level. A high precision external
reference may also be selected to provide lower gain and offset
temperature drift. Figure 49 shows the typical drift
characteristics of the internal reference.
When the SENSE pin is tied to AVDD, the internal reference is
disabled, allowing the use of an external reference. An internal
reference buffer loads the external reference with an equivalent
7 kΩ load. The internal buffer still generates the positive and
negative full-scale references, REFT and REFB, for the ADC
core. The input span is always twice the value of the reference
voltage; therefore, the external reference must be limited to a
maximum of 1 V. If the internal reference of the AD9216 is
used to drive multiple converters to improve gain matching,
the loading of the reference by the other converters must be
considered. Figure 50 depicts how the internal reference
voltage is affected by loading.
10µF
Figure 48. Programmable Reference Configuration (one channel shown)
10µF
SENSE
VIN+
VIN–
V
REF
R2
R1
SELECT
LOGIC
AD9216
CORE
0.5V
ADC
REFT
REFB
0.1µF
0.1µF
0.1µF
10µF
Rev. A | Page 25 of 40
Shared Reference Mode
The shared reference mode allows the user to connect
the references from the dual ADCs together externally for
superior gain and offset matching performance. If the ADCs
are to function independently, the reference decoupling can
be treated independently and can provide superior isolation
between the dual channels. To enable shared reference mode,
the SHARED_REF pin must be tied high, and the external
differential references must be externally shorted. (REFT_A
must be externally shorted to REFT_B, and REFB_A must
be shorted to REFB_B.)
–0.05
–0.10
–0.15
–0.20
–0.25
0.6
0.5
0.4
0.3
0.2
0.1
0.05
0
–40
0
0
–20
0.5
Figure 50. VREF Accuracy vs. Load
Figure 49. Typical VREF Drift
VREF = 1.0V
0
1.0
TEMPERATURE (°C)
I
20
LOAD
1.5
VREF = 1.0V
(mA)
40
2.0
60
2.5
AD9216
80
3.0

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