CDB5381 Cirrus Logic Inc, CDB5381 Datasheet

BOARD EVAL FOR CS5381 192KHZ ADC

CDB5381

Manufacturer Part Number
CDB5381
Description
BOARD EVAL FOR CS5381 192KHZ ADC
Manufacturer
Cirrus Logic Inc
Datasheets

Specifications of CDB5381

Number Of Adc's
2
Number Of Bits
24
Sampling Rate (per Second)
192k
Data Interface
Serial
Inputs Per Adc
1 Differential
Input Range
6.1 Vpp
Power (typ) @ Conditions
360mW @ 5 V
Voltage Supply Source
Analog and Digital
Operating Temperature
-10°C ~ 70°C
Utilized Ic / Part
CS5381
Product
Audio Modules
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Contains lead / RoHS non-compliant
Other names
598-1008
Features
Cirrus Logic, Inc.
www.cirrus.com
Demonstrates recommended layout and
CS8406 generates S/PDIF, and EIAJ-340
Requires only an analog signal source and
grounding arrangements
compatible digital audio
power supplies for a complete Analog-to-
Digital-Converter system
ANALOG
INPUT
Evaluation Board for CS5381
CS5381
Copyright
(All Rights Reserved)
©
AND DATA
CLOCKS
I/O FOR
Cirrus Logic, Inc. 2003
Description
The CDB5381 evaluation board is an excellent means
for quickly evaluating the CS5381 24-bit, stereo A/D con-
verter. Evaluation requires a digital signal analyzer, an
analog signal source, and a power supply.
Also included is a CS8406 digital audio interface trans-
mitter
compatible audio data. The digital audio data is available
via RCA phono and optical connectors.
ORDERING INFORMATION
CDB5381
which
TRANSMITTER
AES/EBU
CS8406
S/PDIF
generates
Evaluation Board
S/PDIF,
CDB5381
and
OUTPUT
S/PDIF
DS563DB1
EIAJ-340
FEB ‘03
1

Related parts for CDB5381

CDB5381 Summary of contents

Page 1

... INPUT Cirrus Logic, Inc. www.cirrus.com Description The CDB5381 evaluation board is an excellent means for quickly evaluating the CS5381 24-bit, stereo A/D con- verter. Evaluation requires a digital signal analyzer, an analog signal source, and a power supply. Also included is a CS8406 digital audio interface trans- ...

Page 2

... Figure 9. Top Layer Silkscreen ..................................................................................................... 12 Figure 10. Top Layer ..................................................................................................................... 13 Figure 11. Bottom Layer................................................................................................................ 14 LIST OF TABLES Table 1. System Connections ........................................................................................................ 4 Table 2. CDB5381 Jumper and Switch Settings ............................................................................ 4 Contacting Cirrus Logic Support For all product questions and inquiries contact a Cirrus Logic Sales Representative. To find one nearest you go to www.cirrus.com IMPORTANT NOTICE “ ...

Page 3

... The evaluation board has been designed to allow interfacing to external systems via the 10-pin header, J13. The schematic for the clock/data input/output is shown in The CDB5381 allows some flexibility as to the generation of the clocks. When the CS5381 and CS8406 are in slave mode, the SCLK and LRCK must be provided via the header, J13. MCLK must be generated from the on board oscillator, Y1 ...

Page 4

... J13 Input/Output for clocks/data S1 Reset for the CDB5381 S2 CDB5381 Configuration Table 2. CDB5381 Jumper and Switch Settings * denotes default factory settings 4 SIGNAL PRESENT -12 V power for the input op-amps +12 V power for the input op-amps +3 power for the CS5381 +2 power for the CS5381 ...

Page 5

... DS563DB1 CDB5381 5 ...

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... CDB5381 DS563DB1 ...

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... DS563DB1 CDB5381 7 ...

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... CDB5381 DS563DB1 ...

Page 9

... DS563DB1 Figure 5. I/O for Clocks/Data Figure 6. CS8406 Digital Audio Interface CDB5381 9 ...

Page 10

... Figure 7. Reset Circuit CDB5381 DS563DB1 ...

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... DS563DB1 CDB5381 11 ...

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... CDB5381 DS563DB1 ...

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... DS563DB1 CDB5381 13 ...

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... CDB5381 DS563DB1 ...

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Notes • ...

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...

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