ADC121S625EVAL/NOPB National Semiconductor, ADC121S625EVAL/NOPB Datasheet - Page 5

• Manufacturer Part Number: ADC121S625EVAL/NOPB
• Description: BOARD EVALUATION FOR ADC121S625
• Manufacturer: National Semiconductor

Specifications of ADC121S625EVAL/NOPB

• Number Of Adc's: 1
• Number Of Bits: 12
• Sampling Rate (per Second): 200k
• Data Interface: Serial
• Inputs Per Adc: 1 Differential
• Input Range: ±VREF
• Power (typ) @ Conditions: 2.25mW @ 200kSPS
• Voltage Supply Source: Single Supply
• Operating Temperature: -40°C ~ 85°C
• Utilized Ic / Part: ADC121S625
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: ADC121S625EVAL

POWER SUPPLY CHARACTERISTICS
PSRR
AC ELECTRICAL CHARACTERISTICS
f
f
f
t
t
t
f
t
SCLK
SCLK
S
ACQ
CONV
CYC
RATE
AD
Symbol
Symbol
ADC121S625 Converter Electrical Characteristics
The following specifications apply for V
less otherwise noted. Boldface limits apply for T
ADC121S625 Timing Specifications
The following specifications apply for V
limits apply for T
Note 1: Absolute maximum ratings are limiting values which indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions
for which the device is functional, but do not guarantee specific performance limits. For guaranteed specifications and test conditions, see the Electrical
Characteristics. The guaranteed specifications apply only for the test conditions listed. Some performance characteristics may degrade when the device is not
operated under the listed test conditions.
Note 2: All voltages are measured with respect to GND = 0V, unless otherwise specified.
Note 3: When the input voltage at any pin exceeds the power supplies (that is, V
The 50 mA maximum package input current rating limits the number of pins that can safely exceed the power supplies with an input current of 10 mA to five.
Note 4: The absolute maximum junction temperature (T
junction-to-ambient thermal resistance (θ
for maximum power dissipation listed above will be reached only when the ADC121S625 is operated in a severe fault condition (e.g. when input or output pins are
driven beyond the power supply voltages, or the power supply polarity is reversed). Obviously, such conditions should always be avoided.
Note 5: Human body model is 100 pF capacitor discharged through a 1.5 kΩ resistor. Machine model is 220 pF discharged through ZERO ohms.
Note 6: See AN450, “Surface Mounting Methods and Their Effect on Product Reliability”, or the section entitled “Surface Mount” found in any post 1986 National
Semiconductor Linear Data Book, for other methods of soldering surface mount devices.
Note 7: Tested limits are guaranteed to National’s AOQL (Average Outgoing Quality Level).
Note 8: Data sheet min/max specification limits are guaranteed by design, test, or statistical analysis.
Note 9: Clock should be in low when CS is asserted, as indicated by the t
Note 10: While the maximum sample rate is f
t
t
t
CSCR
t
CFCS
CHLD
t
CDV
t
t
t
DIS
EN
CH
CL
t
t
r
f
Power Supply Rejection Ratio
Maximum Clock Frequency
Minimum Clock Frequency
Maximum Sample Rate
Track/Hold Acquisition Time
Conversion Time
Throughput Time
Throughput Rate
Aperture Delay
SCLK Fall toCS Fall
CS Fall to SCLK Rise
SCLK Fall to Data Change Hold Time
SCLK Fall to Next D
Rising Edge of CS To D
2nd SCLK Fall after CS Fall to D
SCLK High Time
SCLK Low Time
D
D
OUT
OUT Fall Time
Rise Time
A
= T
Parameter
MIN
Parameter
to T
OUT
MAX
JA
), and the ambient temperature (T
OUT
Valid
: all other limits T
SCLK
Disabled
A
A
/16, the actual sample rate may be lower than this by having the CS rate being slower than f
= +4.5V to 5.5V, V
= +4.5V to 5.5V, V
OUT
J
max) for this device is 150˚C. The maximum allowable power dissipation is dictated by T
Enabled
Offset Change with 1.0V change in
V
Gain Error Change with 1.0V change
in V
Normal Operation
Short Cycled
A
A
= T
A
A
= 25˚C.
MIN
(Note 9)
(Note 9)
CSCR
REF
to T
REF
(Note 8)
A
), and can be calculated using the formula P
Conditions
5
IN
and t
= 2.5V, f
MAX
= 2.5V, f
<
Conditions
AGND or V
CFCS
: all other limits T
specifications.
SCLK
SCLK
IN
>
= 0.8 to 3.2 MHz, f
= 0.8 MHz to 3.2 MHz, C
V
A
or V
(Note 8) (Continued)
A
D
), the current at that pin should be limited to 10 mA.
= 25˚C.
Typical
Typical
38
38
42
42
13
6
5
200
300
4.8
71
83
12
6
D
IN
MAX = (T
= 20 kHz, C
Limits
L
Limits
100
10
50
50
60
60
50
50
J
= 100 pF, Boldface
800
200
200
0
0
max − T
3.2
1.5
2.0
12
16
14
L
A
)/θ
SCLK
= 100 pF, un-
SCLK cycles
SCLK cycles
SCLK cycles
SCLK cycles
SCLK cycles
JA
www.national.com
ksps (max)
MHz (min)
kHz (max)
ksps (min)
ns (max)
ns (max)
ns (max)
ns (max)
ns (max)
ns (min)
ns (min)
ns (min)
ns (min)
ns (min)
. The values
/16.
(Note 7)
Units
(max)
J
Units
(min)
(min)
max, the
dB
dB
ns