ADC11DV200EB/NOPB National Semiconductor, ADC11DV200EB/NOPB Datasheet
ADC11DV200EB/NOPB
Specifications of ADC11DV200EB/NOPB
Related parts for ADC11DV200EB/NOPB
ADC11DV200EB/NOPB Summary of contents
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... Digital Predistortion (DPD) ■ Wireless Communications Infrastructure ■ Medical Imaging ■ Portable Instrumentation ■ Digital Video Block Diagram © 2009 National Semiconductor Corporation ADC11DV200 Features ■ Single 1.8V power supply operation. ■ Power scaling with clock frequency. ■ Internal sample-and-hold. ■ ...
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Connection Diagram Ordering Information Industrial (−40°C ADC11DV200CISQE www.national.com ≤ ≤ T +85°C) A ADC11DV200CISQ 250 pc. Tape and Reel ADC11DV200EB 2 30087501 Package 60 Pin LLP 60 Pin LLP, Evaluation Board ...
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Pin Descriptions and Equivalent Circuits Pin No. Symbol ANALOG I ...
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Pin No. Symbol DIGITAL I/O 57 CLK + 56 CLK - 36 PD_A 53 PD_B 23 OUTSEL LVDS Output Mode 24, 25 D0+,D0- 26, 27 D1+, D1- 28, 29 D2+, D2- 32, 33 D3+, D3- 34, 35 D4+, D4- 39, ...
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Pin No. Symbol CMOS Output Mode 24-29, DA0-DA10 32-35,51 39-44, DB0-DB10 47-50,52 37 DRDYA 38 DRDYB ANALOG POWER 8, 16, 18, 59 12, 15, AGND 22, 55, 58, EP DIGITAL POWER 21 ...
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... Absolute Maximum Ratings If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/ Distributors for availability and specifications. Supply Voltage ( Voltage on Any Pin (Not to exceed 2.2V) Input Current at Any Pin other than Supply Pins (Note 4) Package Input Current (Note 4) ...
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Dynamic Converter Electrical Characteristics Unless otherwise specified, the following specifications apply: AGND = DRGND = 0V, V CLK duty cycle = 50%, DCS = ON, Internal 0.75V Reference, LVDS Output. Typical values are for T ≤ ≤ apply for T ...
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Symbol Parameter Power Consumption Power Down Power Consumption Input/Output Logic Electrical Characteristics Unless otherwise specified, the following specifications apply: AGND = DRGND = 0V, V CLK duty cycle = 50%, DCS = ON, Internal 0.75V Reference. Typical values are for ...
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Symbol Parameter LVDS OUTPUT MODE t Data Output Setup Time SU t Data Output Hold Time H t Aperture Delay AD t Aperture Jitter AJ t Data-Data Skew SKEW CMOS OUTPUT MODE (Note 12) Maximum Clock Frequency Minimum Clock Frequency ...
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Specification Definitions APERTURE DELAY is the time after the falling edge of the clock to when the input signal is acquired or held for conver- sion. APERTURE JITTER (APERTURE UNCERTAINTY) is the variation in aperture delay from sample to sample. ...
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Timing Diagrams FIGURE 1. LVDS Output Timing FIGURE 2. CMOS Output Timing 11 30087509 30087516 www.national.com ...
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Transfer Characteristic www.national.com FIGURE 3. Transfer Characteristic 12 30087510 ...
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Typical Performance Characteristics DNL, INL specifications apply: AGND = DRGND = 0V 25° DNL Unless otherwise specified, the following = +1.8V 200 MHz, 50% ...
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Typical Performance Characteristics AGND = DRGND = 0V MHz 25°C. A SNR, SINAD, SFDR vs. V SNR, SINAD, SFDR vs. Temperature SNR, SINAD, SFDR vs. Clock Duty Cycle, f www.national.com ...
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SNR, SINAD, SFDR vs. Ext. Reference Voltage SNR, SINAD, SFDR vs. Clock Frequency SNR, SINAD, SFDR vs. Ext. V Distortion vs. Ext. Reference Voltage 30087557 Distortion vs. Clock Frequency 30087559 Distortion vs. Ext 30087561 15 30087558 30087560 CM ...
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Spectral Response @ 10 MHz Input Spectral Response @ 170 MHz Input Total Power vs. Clock Frequency, f www.national.com Spectral Response @ 70 MHz Input 30087563 IMD, f 30087565 = 10 MHz IN 30087567 16 30087564 MHz, ...
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Functional Description Operating on a single +1.8V supply, the ADC11DV200 digi- tizes two differential analog input signals to 11 bits, using a differential pipelined architecture with error correction circuitry and an on-chip sample-and-hold circuit to ensure maximum performance. The user ...
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− REF CM V − REF − REF CM V ...
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A 0.1 µF capacitor should be placed between V and V as close to the pins as pos sible. This configuration is shown ...
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www.national.com 20 ...
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POWER SUPPLY CONSIDERATIONS The power supply pins should be bypassed with a 0.1 µF ca- pacitor and with a 100 pF ceramic chip capacitor close to each power pin. Leadless chip capacitors are preferred because they have low series ...
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Physical Dimensions TOP View...............................SIDE View...............................BOTTOM View www.national.com inches (millimeters) unless otherwise noted 60-Lead LLP Package Ordering Numbers: ADC11DV200CISQ NS Package Number SQA60A 22 ...
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Notes 23 www.national.com ...
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... For more National Semiconductor product information and proven design tools, visit the following Web sites at: Products Amplifiers www.national.com/amplifiers Audio www.national.com/audio Clock and Timing www.national.com/timing Data Converters www.national.com/adc Interface www.national.com/interface LVDS www.national.com/lvds Power Management www.national.com/power Switching Regulators www.national.com/switchers LDOs www.national.com/ldo LED Lighting www ...