PIC16F688T-I/SL Microchip Technology, PIC16F688T-I/SL Datasheet - Page 116

• Manufacturer Part Number: PIC16F688T-I/SL
• Description: IC MCU PIC FLASH 4KX14 14SOIC
• Manufacturer: Microchip Technology
• Series: PIC® 16Fr

Specifications of PIC16F688T-I/SL

• Core Size: 8-Bit
• Program Memory Size: 7KB (4K x 14)
• Core Processor: PIC
• Speed: 20MHz
• Connectivity: UART/USART
• Peripherals: Brown-out Detect/Reset, POR, WDT
• Number Of I /o: 12
• Program Memory Type: FLASH
• Eeprom Size: 256 x 8
• Ram Size: 256 x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 14-SOIC (3.9mm Width), 14-SOL
• Controller Family/series: PIC16F
• No. Of I/o's: 12
• Eeprom Memory Size: 256Byte
• Ram Memory Size: 256Byte
• Cpu Speed: 20MHz
• No. Of Timers: 2
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: XLT14SO-1 - SOCKET TRANSITION 14SOIC 150/208AC162061 - HEADER INTRFC MPLAB ICD2 20PINAC162056 - HEADER INTERFACE ICD2 16F688
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant
• Other names: PIC16F688T-I/SL; PIC16F688T-I/SLTR

PIC16F688
11.2.4
The BOREN0 and BOREN1 bits in the Configuration
Word register selects one of four BOR modes. Two
modes have been added to allow software or hardware
control of the BOR enable. When BOREN<1:0> = 01,
the SBOREN bit of the PCON register enables/disables
the BOR, allowing it to be controlled in software. By
selecting BOREN<1:0>, the BOR is automatically
disabled in Sleep to conserve power and enabled on
wake-up. In this mode, the SBOREN bit is disabled.
See
definition.
If V
(T
tions”), the Brown-out situation will reset the device.
FIGURE 11-3:
DS41203E-page 114
BOD
DD
) (see Section 14.0 “Electrical Specifica-
Register 11-1
Note 1: 64 ms delay only if PWRTE bit is programmed to ‘0’.
falls below V
BROWN-OUT RESET (BOR)
Internal
Internal
Internal
Reset
Reset
Reset
V
V
V
DD
DD
DD
BOD
for
BROWN-OUT SITUATIONS
for greater than parameter
the
Configuration
Word
< 64 ms
64 ms
This will occur regardless of V
not insured to occur if V
than parameter (T
On any Reset (Power-on, Brown-out Reset, Watchdog
Timer, etc.), the chip will remain in Reset until V
above V
will now be invoked, if enabled and will keep the chip in
Reset an additional 64 ms.
If V
running, the chip will go back into a Brown-out Reset
and the Power-up Timer will be re-initialized. Once V
rises above V
64 ms Reset.
(1)
Note:
64 ms
64 ms
DD
drops below V
(1)
BOD
(1)
The Power-up Timer is enabled by the
PWRTE bit in the Configuration Word
register.
(see Figure 11-3). The Power-up Timer
BOD
BOD
, the Power-up Timer will execute a
BOD
).
© 2009 Microchip Technology Inc.
DD
while the Power-up Timer is
V
V
V
falls below V
BOD
BOD
BOD
DD
slew rate. A Reset is
BOD
DD
for less
rises
DD