PIC16F688T-I/SL Microchip Technology, PIC16F688T-I/SL Datasheet - Page 84

• Manufacturer Part Number: PIC16F688T-I/SL
• Description: IC MCU PIC FLASH 4KX14 14SOIC
• Manufacturer: Microchip Technology
• Series: PIC® 16Fr

Specifications of PIC16F688T-I/SL

• Core Size: 8-Bit
• Program Memory Size: 7KB (4K x 14)
• Core Processor: PIC
• Speed: 20MHz
• Connectivity: UART/USART
• Peripherals: Brown-out Detect/Reset, POR, WDT
• Number Of I /o: 12
• Program Memory Type: FLASH
• Eeprom Size: 256 x 8
• Ram Size: 256 x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 14-SOIC (3.9mm Width), 14-SOL
• Controller Family/series: PIC16F
• No. Of I/o's: 12
• Eeprom Memory Size: 256Byte
• Ram Memory Size: 256Byte
• Cpu Speed: 20MHz
• No. Of Timers: 2
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: XLT14SO-1 - SOCKET TRANSITION 14SOIC 150/208AC162061 - HEADER INTRFC MPLAB ICD2 20PINAC162056 - HEADER INTERFACE ICD2 16F688
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant
• Other names: PIC16F688T-I/SL; PIC16F688T-I/SLTR

PIC16F688
FIGURE 9-1:
TABLE 9-1:
DS41203E-page 82
EECON1
EECON2
EEADR
EEADRH
EEDAT
EEDATH
INTCON
PIE1
PIR1
Legend:
Flash ADDR
Name
Flash Data
EEDATH
Register
EERHLT
EEDAT
RD bit
x = unknown, u = unchanged, — = unimplemented read as ‘0’, q = value depends upon condition.
Shaded cells are not used by data EEPROM module.
EEPROM Control Register 2 (not a physical register)
EEADR7
EEDAT7
EEPGD
EEIE
EEIF
Bit 7
GIE
—
—
Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4
SUMMARY OF REGISTERS ASSOCIATED WITH DATA EEPROM
INSTR(PC - 1)
executed here
EEADR6
PC
EEDAT6
FLASH PROGRAM MEMORY READ CYCLE EXECUTION
ADIE
ADIF
Bit 6
PEIE
—
—
—
INSTR (PC)
EEDATH5
EEADR5
EEDAT5
RCIE
RCIF
Bit 5
T0IE
BSF EECON1,RD
—
—
executed here
PC + 1
EEDATH4
EEADR4
EEDAT4
C2IE
C2IF
INTE
Bit 4
INSTR (PC + 1)
—
—
EEADRH,EEADR
INSTR(PC + 1)
EEADRH3
EEDATH3
executed here
EEADR3
EEDAT3
WRERR
RABIE
C1IE
C1IF
Bit 3
EEDATH,EEDAT
EEADRH2
EEDATH2
EEADR2
EEDAT2
OSFIE
OSFIF
WREN
Bit 2
T0IF
executed here
Forced NOP
PC + 3
PC+3
EEADRH1
EEDATH1
EEADR1
EEDAT1
TXIE
TXIF
Bit 1
INTF
WR
INSTR (PC + 3)
EEADRH0
EEDATH0
TMR1IE
TMR1IF
EEADR0
EEDAT0
INSTR(PC + 3)
RABIF
executed here
Bit 0
RD
© 2009 Microchip Technology Inc.
PC + 4
x--- x000
---- ----
0000 0000
---- 0000
0000 0000
--00 0000
0000 000x
0000 0000
0000 0000
INSTR (PC + 4)
POR, BOR
Value on
INSTR(PC + 4)
executed here
PC + 5
0--- q000
---- ----
0000 0000
---- 0000
0000 0000
--00 0000
0000 000x
0000 0000
0000 0000
Value on
all other
Resets