PIC12F629-I/P Microchip Technology, PIC12F629-I/P Datasheet - Page 20

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PIC12F629-I/P

Manufacturer Part Number
PIC12F629-I/P
Description
IC MCU CMOS FLASH-BASE 8BIT 8DIP
Manufacturer
Microchip Technology
Series
PIC® 12Fr

Specifications of PIC12F629-I/P

Program Memory Type
FLASH
Program Memory Size
1.75KB (1K x 14)
Package / Case
8-DIP (0.300", 7.62mm)
Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Peripherals
POR, WDT
Number Of I /o
5
Eeprom Size
128 x 8
Ram Size
64 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
PIC12F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
64 B
Interface Type
RS- 232/USB
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
6
Number Of Timers
2
Operating Supply Voltage
2 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
Through Hole
3rd Party Development Tools
52715-96, 52716-328, 52717-734
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, DM163014, DM164120-4
Minimum Operating Temperature
- 40 C
Data Rom Size
128 B
Height
3.3 mm
Length
9.27 mm
Supply Voltage (max)
5.5 V
Supply Voltage (min)
2 V
Width
6.35 mm
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
DM163029 - BOARD PICDEM FOR MECHATRONICSAC124001 - MODULE SKT PROMATEII 8DIP/SOIC
Data Converters
-
Connectivity
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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0
PIC12F629/675
2.4
The INDF register is not a physical register. Addressing
the INDF register will cause indirect addressing.
Indirect addressing is possible by using the INDF
register. Any instruction using the INDF register
actually accesses data pointed to by the File Select
Register (FSR). Reading INDF itself indirectly will
produce 00h. Writing to the INDF register indirectly
results in a no operation (although Status bits may be
affected). An effective 9-bit address is obtained by
concatenating the 8-bit FSR register and the IRP bit
(STATUS<7>), as shown in Figure 2-2.
FIGURE 2-2:
DS41190G-page 20
Bank Select Location Select
RP1
For memory map detail see Figure 2-2.
Note 1: The RP1 and IRP bits are reserved; always maintain these bits clear.
(1)
Indirect Addressing, INDF and
FSR Registers
RP0
Direct Addressing
6
Data
Memory
DIRECT/INDIRECT ADDRESSING PIC12F629/675
From Opcode
7Fh
00h
Bank 0
00
0
Bank 1
01
Bank 2
10
Not Used
A simple program to clear RAM location 20h-2Fh using
indirect addressing is shown in Example 2-1.
EXAMPLE 2-1:
NEXT
CONTINUE
Bank 3
11
IRP
MOVLW
MOVWF
CLRF
INCF
BTFSS
GOTO
Bank Select
180h
(1)
1FFh
0x20
FSR
INDF
FSR
FSR,4
NEXT
7
Indirect Addressing
INDIRECT ADDRESSING
 2010 Microchip Technology Inc.
;initialize pointer
;to RAM
;clear INDF register
;inc pointer
;all done?
;no clear next
;yes continue
FSR Register
Location Select
0

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