PIC16F716-I/P Microchip Technology, PIC16F716-I/P Datasheet - Page 52
![IC PIC MCU FLASH 2KX14 18DIP](/photos/6/76/67657/18-dip_300mil__sml.jpg)
PIC16F716-I/P
Manufacturer Part Number
PIC16F716-I/P
Description
IC PIC MCU FLASH 2KX14 18DIP
Manufacturer
Microchip Technology
Series
PIC® 16Fr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC16F688T-ISL.pdf
(688 pages)
3.PIC16F716-ISO.pdf
(136 pages)
4.PIC16F716-ISO.pdf
(12 pages)
5.PIC16F716-ESO.pdf
(126 pages)
Specifications of PIC16F716-I/P
Program Memory Type
FLASH
Program Memory Size
3.5KB (2K x 14)
Package / Case
18-DIP (0.300", 7.62mm)
Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
13
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 4x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
PIC16F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
128 B
Interface Type
RS- 232/USB
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
13
Number Of Timers
3
Operating Supply Voltage
2 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
Through Hole
3rd Party Development Tools
52715-96, 52716-328, 52717-734
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000
Minimum Operating Temperature
- 40 C
On-chip Adc
4-ch x 8-bit
Package
18PDIP
Device Core
PIC
Family Name
PIC16
Maximum Speed
20 MHz
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
I3-DB16F716 - BOARD DAUGHTER ICEPIC3AC162054 - HEADER INTERFACE ICD2 16F716ACICE0202 - ADAPTER MPLABICE 18P 300 MILAC164010 - MODULE SKT PROMATEII DIP/SOIC
Eeprom Size
-
Connectivity
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC16F716-I/P
Manufacturer:
MICROCHIP
Quantity:
5 373
Part Number:
PIC16F716-I/P
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
PIC16F716
8.2
In Compare mode, the 16-bit CCPR1 register value is
constantly compared against the TMR1 register pair
value. When a match occurs, the CCP1 module may:
• Toggle the CCP1 output.
• Set the CCP1 output.
• Clear the CCP1 output.
• Generate a Special Event Trigger.
• Generate a Software Interrupt.
The action on the pin is based on the value of the
CCP1M<3:0> control bits of the CCP1CON register.
All Compare modes can generate an interrupt.
FIGURE 8-2:
8.2.1
The user must configure the CCP1 pin as an output by
clearing the associated TRIS bit.
DS41206B-page 50
Note:
CCP1
Pin
Special Event Trigger will:
• Clear TMR1H and TMR1L registers.
• NOT set interrupt flag bit TMR1IF of the PIR1 register.
• Set the GO/DONE bit to start the ADC conversion.
Output Enable
TRIS
Compare Mode
CCP1 PIN CONFIGURATION
Clearing the CCP1CON register will force
the CCP1 compare output latch to the
default low level. This is not the PORT I/O
data latch.
Q
Special Event Trigger
CCP1CON<3:0>
R
S
Mode Select
Output
COMPARE MODE
OPERATION BLOCK
DIAGRAM
Logic
Set CCP1IF Interrupt Flag
4
(PIR1)
Match
CCPR1H CCPR1L
TMR1H
Comparator
TMR1L
8.2.2
In Compare mode, Timer1 must be running in either
Timer mode or Synchronized Counter mode. The
compare operation may not work in Asynchronous
Counter mode.
8.2.3
When Generate Software Interrupt mode is chosen
(CCP1M<3:0> = 1010), the CCP1 module does not
assert control of the CCP1 pin (see the CCP1CON
register).
8.2.4
When Special Event Trigger mode is chosen
(CCP1M<3:0> = 1011), the CCP1 module does the
following:
• Resets Timer1
• Starts an ADC conversion if ADC is enabled
The CCP1 module does not assert control of the CCP1
pin in this mode (see the CCP1CON register).
The Special Event Trigger output of the CCP occurs
immediately upon a match between the TMR1H,
TMR1L register pair and the CCPR1H, CCPR1L
register pair. The TMR1H, TMR1L register pair is not
reset until the next rising edge of the Timer1 clock. This
allows the CCPR1H, CCPR1L register pair to
effectively provide a 16-bit programmable period
register for Timer1.
Note 1: The Special Event Trigger from the CCP
2: Removing
TIMER1 MODE SELECTION
SOFTWARE INTERRUPT MODE
SPECIAL EVENT TRIGGER
module does not set interrupt flag bit
TMRxIF of the PIR1 register.
changing the contents of the CCPR1H
and CCPR1L register pair, between the
clock edge that generates the Special
Event Trigger and the clock edge that
generates the Timer1 Reset, will preclude
the Reset from occurring.
© 2007 Microchip Technology Inc.
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