PIC16F630-I/SL Microchip Technology, PIC16F630-I/SL Datasheet

PIC16F630-I/SL

Manufacturer Part Number

PIC16F630-I/SL

Description

IC MCU FLASH 1KX14 EEPROM 14SOIC

Manufacturer

Microchip Technology

Series

PIC® 16Fr

Datasheets

1.PIC16F616T-ISL.pdf (8 pages)

2.PIC12F629T-ISN.pdf (24 pages)

3.PIC16F630-ISL.pdf (132 pages)

4.PIC16F630-ISL.pdf (2 pages)

5.PIC16F630-ISL.pdf (10 pages)

6.PIC16F676-EP.pdf (132 pages)

7.PIC16F676-ISL.pdf (130 pages)

Specifications of PIC16F630-I/SL

Program Memory Type

FLASH

Program Memory Size

1.75KB (1K x 14)

Package / Case

14-SOIC (3.9mm Width), 14-SOL

Core Processor

PIC

Core Size

8-Bit

Speed

20MHz

Peripherals

Brown-out Detect/Reset, POR, WDT

Number Of I /o

Eeprom Size

128 x 8

Ram Size

64 x 8

Voltage - Supply (vcc/vdd)

2 V ~ 5.5 V

Oscillator Type

Internal

Operating Temperature

-40°C ~ 85°C

Processor Series

PIC16F

Core

PIC

Data Bus Width

8 bit

Data Ram Size

64 B

Interface Type

RS- 232/USB

Maximum Clock Frequency

20 MHz

Number Of Programmable I/os

Number Of Timers

Operating Supply Voltage

2 V to 5.5 V

Maximum Operating Temperature

+ 85 C

Mounting Style

SMD/SMT

3rd Party Development Tools

52715-96, 52716-328, 52717-734

Development Tools By Supplier

PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, DM163014, DM164120-4

Minimum Operating Temperature

- 40 C

Package

14SOIC N

Device Core

PIC

Family Name

PIC16

Maximum Speed

20 MHz

Lead Free Status / RoHS Status

Lead free / RoHS Compliant

Data Converters

Connectivity

Lead Free Status / Rohs Status

Lead free / RoHS Compliant

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Download datasheet (218Kb)

The PIC16F630/676 parts you have received conform

functionally to the Device Data Sheet (DS40039E),

except for the anomalies described below.

All issues listed here will be addressed in future

revisions of the PIC16F630/676 silicon.

1. Module: Data EEPROM Memory

The EEIF flag may be cleared inadvertently when

performing operations on the PIR1 register simul-

taneously with the completion of an EEPROM

write. This condition occurs when the EEPROM

write timer completes at the same moment that the

PIR1 register operation is executed. Register

operations are those that have the PIR1 register

as the destination and include, but are not limited

to, BSF, BCF, ANDWF, IORWF and XORWF.

Work around

1. Avoid operations on the PIR1 register when

2. Poll the WR bit (EECON1<1>) to determine

3. Use a timer interrupt to catch any instances

4. If periodic interrupts are occurring in addition to

writing to the EEPROM memory.

when the write is complete.

when the EEIF flag is inadvertently cleared.

The timer interrupt should be set longer than

8 ms. If EEIF fails then the timer interrupt

occurs as a default time out. The WR and

WRERR flags are checked as part of the timer

Interrupt

EEPROM write success.

the EEIF interrupts, then use a secondary flag

to sense write completion. The secondary flag

is set whenever EEPROM writes are active. An

EEPROM write completion is indicated when

the secondary flag is set and the WR flag is

clear.

PIC16F630/676 Rev. A Silicon/Data Sheet Errata

Service

Routine

verify

the

PIC16F630/676

2. Module: Power-on Reset (Rising V

The PIC16F630/676 Power-on Reset (POR)

circuitry is sensitive to a low V

to release the Reset if V

voltage after dropping to a very low level.

The sensitive V

drops into an out-of-specification voltage region

below the Brown-out Detect threshold and then

recovers to a normal operating condition. The

voltage region that can cause the problem is

dependant upon temperature with the region

growing as the temperature drops. A typical region

is between 0.5 and 0.7V at -25°C. Below the

region, the POR operates correctly. Above the

region, the POR is inactive per the data sheet.

Inside the region, the POR will assert Reset and

will not release Reset until power is removed and

independent of other Reset circuits (see Figure 9-4

of the data sheet), activating BOR or using the

MCLR input will not eliminate the problem.

Work around

To resolve this problem the application must be

designed to assure that V

described as D003 V

Specifications”

(DS40039).

reaches

Detect)

POR

condition occurs when V

the

Because

in Section 12.0 “Electrical

returns to an operational

Device

reaches V

level and may fail

DS80185F-page 1

the

Data

POR

. This is

Sheet

Related parts for PIC16F630-I/SL

PIC16F630-I/SL Summary of contents

Page 1

... PIC16F630/676 Rev. A Silicon/Data Sheet Errata The PIC16F630/676 parts you have received conform functionally to the Device Data Sheet (DS40039E), except for the anomalies described below. All issues listed here will be addressed in future revisions of the PIC16F630/676 silicon. 1. Module: Data EEPROM Memory The EEIF flag may be cleared inadvertently when ...

Page 2

... TSSOP (4.4mm) Pattern: 3-Digit Pattern Code for QTP (blank otherwise). DS80185F-page 2 /XX XXX Examples: Package Pattern a) PIC16F630 - E/P 301 = Extended Temp., PDIP package, 20 MHz, QTP pattern #301. b) PIC16F676 - I/SL = Industrial Temp., range 2.0V to 5.5V SOIC package, 20 MHz. DD © 2007 Microchip Technology Inc. ...

Page 3

... The ANSEL (91h) and CMCON (19h)..... © 2007 Microchip Technology Inc. U-0 R/W-1 R/W-1 R-1 — TRISA5 TRISA4 TRISA3 W = Writable bit U = Unimplemented bit, read as ‘0’ ‘1’ = Bit is set ‘0’ = Bit is cleared PIC16F630/676 R/W-1 R/W-1 R/W-1 TRISA2 TRISA1 TRISA0 bit Bit is unknown DS80185F-page 3 ...

Page 4

... Pin Diagram 16-pin QFN RA5/T1CKI/OSC1/CLKIN RA4/T1G/OSC2/CLKOUT RA3/MCLR/V RA5/T1CKI/OSC1/CLKIN RA4/AN3//T1G/OSC2/CLKOUT RA3/MCLR/V 14.1 Package Marking Information 16-Lead QFN XXXXXX XXXXXX YWWNNN DS80185F-page 4 12 RA0/C1IN+/ICSPDAT 1 11 RA1/CIN-/V 2 PIC16F630 10 RA2/COUT/T0CKI/INT PP 3 RC5 9 RC0 4 12 RA0/AN0/CIN+/ICSPDAT 1 11 RA1/AN1/CIN-/V 2 PIC16F676 10 RA2/AN2/COUT/T0CKI/INT PP 3 RC5 ...

Page 5

... MILLIMETERS Dimension Limits MIN N e 0.65 BSC A 0. 4.00 BSC E2 2.50 D 4.00 BSC D2 2.50 b 0.25 L 0.30 K 0.20 PIC16F630/676 NOM MAX 16 0.90 1.00 0.02 0.05 0.20 REF 2.65 2.80 2.65 2.80 0.30 0.35 0.40 0.50 – – Microchip Technology Drawing C04-127B ...

Page 6

... PIC16F630/676 5. Module: PORTA: Initializing Example Change Example 3-1: Initializing PORTA to the following (bold text): EXAMPLE 3-1: INITIALIZING PORTA BCF STATUS,RP0 ;Bank 0 CLRF PORTA ;Init PORTA MOVLW 07h ;Set RA<2:0> to MOVWF CMCON ;digital I/O BSF STATUS,RP0 ;Bank 1 CLRF ANSEL ;digital I/O MOVLW 0Ch ...

Page 7

... Data Sheet Clarifications/Corrections Section: Added Module 4: New 4x4 QFN Package added. Rev. E Document (8/2006) Added Module 2: “Power-on Reset (Rising V Detect)” for PIC16F630/676 silicon. Rev. F Document (3/2007) Data Sheet Clarifications/Corrections Section: Module 1, Figure 1 - updated package SL; Module 4 - updated QFN package; Added Module 5: “PORTA: Initializing Example” ...

Page 8

Page 9

... Select Mode, Smart Serial, SmartTel, Total Endurance, UNI/O, WiperLock and ZENA are trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. SQTP is a service mark of Microchip Technology Incorporated in the U.S.A. All other trademarks mentioned herein are property of their respective companies. ...

Page 10

... Fax: 886-3-572-6459 Taiwan - Kaohsiung Tel: 886-7-536-4818 Fax: 886-7-536-4803 Taiwan - Taipei Tel: 886-2-2500-6610 Fax: 886-2-2508-0102 Thailand - Bangkok Tel: 66-2-694-1351 Fax: 66-2-694-1350 © 2007 Microchip Technology Inc. EUROPE Austria - Wels Tel: 43-7242-2244-39 Fax: 43-7242-2244-393 Denmark - Copenhagen Tel: 45-4450-2828 Fax: 45-4485-2829 France - Paris Tel: 33-1-69-53-63-20 ...

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