ATTINY45-20MU Atmel, ATTINY45-20MU Datasheet - Page 26

IC AVR MCU FLASH 4K 20MHZ 20MLF

ATTINY45-20MU

Manufacturer Part Number
ATTINY45-20MU
Description
IC AVR MCU FLASH 4K 20MHZ 20MLF
Manufacturer
Atmel
Series
AVR® ATtinyr
Datasheets

Specifications of ATTINY45-20MU

Core Processor
AVR
Core Size
8-Bit
Speed
20MHz
Connectivity
USI
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
6
Program Memory Size
4KB (2K x 16)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 4x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
20-MLF®, QFN
Processor Series
ATTINY4x
Core
AVR8
Data Bus Width
8 bit
Data Ram Size
256 B
Interface Type
USI
Maximum Clock Frequency
10 MHz
Number Of Programmable I/os
6
Number Of Timers
2
Operating Supply Voltage
2.7 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWAVR, EWAVR-BL
Development Tools By Supplier
ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 4 Channel
For Use With
ATSTK600 - DEV KIT FOR AVR/AVR32ATAVRBC100 - REF DESIGN KIT BATTERY CHARGER770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAGATAVRDRAGON - KIT DRAGON 32KB FLASH MEM AVRATAVRISP2 - PROGRAMMER AVR IN SYSTEMATJTAGICE2 - AVR ON-CHIP D-BUG SYSTEM
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ATTINY45-20MU
Manufacturer:
ATMEL
Quantity:
876
9.4
26
Rev. 2586J-12/06
ATtiny25/45/85
1.
2.
3.
4.
5.
6.
7.
8.
9.
10.
11.
12.
13.
14.
15.
16.
17.
18.
19.
20.
21.
22.
23.
24.
10. Updated Package Description in Sections:
11. Updated Package Drawing:
12. Updated Order Codes for:
“Errata ATtiny85” on page 23
“ATtiny25” on page 11
“ATtiny45” on page 12
“ATtiny85” on page 13
“S8S1” on page 16
“ATtiny25” on page 11
Updated
Updated description of instruction length in
Updated Flash size in
page
Updated cross-references in sections
“Write”
Updated
Updated
Replaced single clocking system figure with two:
Updated
Updated
Updated
Updated
Updated
Updated
Updated “Bit 0” in
Added footnote to
Updated
Deleted “Bits 7, 2” in
Updated and moved section “Timer/Counter0 Prescaler and Clock Sources”, now
located on
Updated
Updated bit description in
and
Added recommended maximum frequency
page
Updated
Updated
Updated
“PLLCSR – PLL Control and Status Register” on page
15.
129.
, starting on
“Low Power Consumption” on page
“Atomic Byte Programming” on page
“Internal PLL for Fast Peripheral Clock Generation - clkPCK” on page
Table 6-1 on page
“Calibrated Internal Oscillator” on page
Table 6-5 on page
“OSCCAL – Oscillator Calibration Register” on page
“CLKPR – Clock Prescale Register” on page
“Power-down Mode” on page
Table 10-5 on page
“Timer/Counter1 Initialization for Asynchronous Mode” on page
Figure 17-8 on page 133
“Temperature Measurement” on page
Table 17-3 on page
page
68.
“PRR – Power Reduction Register” on page
Table 8-3 on page
page
“MCUCR – MCU Control Register” on page
“In-System Re-programmable Flash Program Memory” on
17.
“PLLCSR – PLL Control and Status Register” on page 97
25,
27.
65.
138.
Table 6-13 on page 30
.
49.
36.
“Atomic Byte Programming”
in“Prescaling and Conversion Timing” on
“Architectural Overview”
1.
17.
137.
27.
Figure 6-2
33.
and
107.
Table 6-6 on page
and
32.
39.
Figure
66.
.
,
“Erase”
6-3.
2586M–AVR–07/10
89.
28.
24.
and

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