ATTINY45-20MU Atmel, ATTINY45-20MU Datasheet - Page 4
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ATTINY45-20MU
Manufacturer Part Number
ATTINY45-20MU
Description
IC AVR MCU FLASH 4K 20MHZ 20MLF
Manufacturer
Atmel
Series
AVR® ATtinyr
Specifications of ATTINY45-20MU
Core Processor
AVR
Core Size
8-Bit
Speed
20MHz
Connectivity
USI
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
6
Program Memory Size
4KB (2K x 16)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 4x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
20-MLF®, QFN
Processor Series
ATTINY4x
Core
AVR8
Data Bus Width
8 bit
Data Ram Size
256 B
Interface Type
USI
Maximum Clock Frequency
10 MHz
Number Of Programmable I/os
6
Number Of Timers
2
Operating Supply Voltage
2.7 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWAVR, EWAVR-BL
Development Tools By Supplier
ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 4 Channel
For Use With
ATSTK600 - DEV KIT FOR AVR/AVR32ATAVRBC100 - REF DESIGN KIT BATTERY CHARGER770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAGATAVRDRAGON - KIT DRAGON 32KB FLASH MEM AVRATAVRISP2 - PROGRAMMER AVR IN SYSTEMATJTAGICE2 - AVR ON-CHIP D-BUG SYSTEM
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
ATTINY45-20MU
Manufacturer:
ATMEL
Quantity:
876
2. Overview
2.1
4
Block Diagram
ATtiny25/45/85
The ATtiny25/45/85 is a low-power CMOS 8-bit microcontroller based on the AVR enhanced
RISC architecture. By executing powerful instructions in a single clock cycle, the ATtiny25/45/85
achieves throughputs approaching 1 MIPS per MHz allowing the system designer to optimize
power consumption versus processing speed.
Figure 2-1.
The AVR core combines a rich instruction set with 32 general purpose working registers. All 32
registers are directly connected to the Arithmetic Logic Unit (ALU), allowing two independent
VCC
GND
PROGRAMMING
INSTRUCTION
INSTRUCTION
PROGRAM
PROGRAM
COUNTER
CONTROL
Block Diagram
REGISTER
DECODER
FLASH
LINES
LOGIC
POINTER
REGISTER
REGISTERS
GENERAL
PURPOSE
STATUS
STACK
SRAM
ALU
X
Y
Z
DATA REGISTER
PORT B
8-BIT DATABUS
PORT B DRIVERS
PB[0:5]
REG.PORT B
DATA DIR.
MCU CONTROL
MCU STATUS
WATCHDOG
INTERFACE
UNIVERSAL
INTERRUPT
REGISTER
REGISTER
COUNTER0
COUNTER1
EEPROM
TIMER/
TIMER/
SERIAL
TIMER
DATA
UNIT
ANALOG COMPARATOR
ADC /
OSCILLATOR
TIMING AND
CALIBRATED
OSCILLATORS
CONTROL
INTERNAL
RESET
2586M–AVR–07/10