ATTINY45-20MU Atmel, ATTINY45-20MU Datasheet - Page 27
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ATTINY45-20MU
Manufacturer Part Number
ATTINY45-20MU
Description
IC AVR MCU FLASH 4K 20MHZ 20MLF
Manufacturer
Atmel
Series
AVR® ATtinyr
Specifications of ATTINY45-20MU
Core Processor
AVR
Core Size
8-Bit
Speed
20MHz
Connectivity
USI
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
6
Program Memory Size
4KB (2K x 16)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 4x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
20-MLF®, QFN
Processor Series
ATTINY4x
Core
AVR8
Data Bus Width
8 bit
Data Ram Size
256 B
Interface Type
USI
Maximum Clock Frequency
10 MHz
Number Of Programmable I/os
6
Number Of Timers
2
Operating Supply Voltage
2.7 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWAVR, EWAVR-BL
Development Tools By Supplier
ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 4 Channel
For Use With
ATSTK600 - DEV KIT FOR AVR/AVR32ATAVRBC100 - REF DESIGN KIT BATTERY CHARGER770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAGATAVRDRAGON - KIT DRAGON 32KB FLASH MEM AVRATAVRISP2 - PROGRAMMER AVR IN SYSTEMATJTAGICE2 - AVR ON-CHIP D-BUG SYSTEM
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
ATTINY45-20MU
Manufacturer:
ATMEL
Quantity:
876
9.5
9.6
2586M–AVR–07/10
Rev. 2586I-09/06
Rev. 2586H-06/06
25.
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2.
3.
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Updated bit R/W descriptions in:
“TIMSK – Timer/Counter Interrupt Mask Register” on page
“TIFR – Timer/Counter Interrupt Flag Register” on page
“TIMSK – Timer/Counter Interrupt Mask Register” on page
“TIFR – Timer/Counter Interrupt Flag Register” on page
“PLLCSR – PLL Control and Status Register” on page
“TIMSK – Timer/Counter Interrupt Mask Register” on page
“TIFR – Timer/Counter Interrupt Flag Register” on page
“PLLCSR – PLL Control and Status Register” on page 107
“DIDR0 – Digital Input Disable Register 0” on page
Added limitation to
Updated
Updated
Updated
Updated
Updated
Updated
Updated
Updated
Updated
Updated
All Characterization data moved to
All Register Descriptions are gathered up in seperate sections in the end of each
chapter.
Updated
Table 20-4 on page
Updated
Updated Note in
Updated
Updated Register Description in
Updated Features in
Updated Code Example in
Slave Operation Example” on page
Updated
Updated
Updated
Updated
Updated
Updated
Added
Table 21-2 on page
“DC Characteristics” on page
Table 21-7 on page
Figure 21-6 on page
Table 21-12 on page
Table 22-1 on page
Table 22-2 on page
Table
Table
Table 22-39 on page
Table
Table 11-3 on page
“Calibrated Internal Oscillator” on page
“System Control and Reset” on page
“Analog Comparator Multiplexed Input” on page
Figure 17-1 on page
“Signature Bytes” on page
“Electrical Characteristics” on page
“Calibrated Internal Oscillator” on page
Table 6.5.1 on page
22-30,
22-33,
22-46,
Table 7-1 on page
“Limitations of debugWIRE” on page
152.
“USI – Universal Serial Interface” on page
Table 22-31
Table 22-34
Table
169.
“SPI Master Operation Example” on page 113
22-47,
81,
171.
182.
182.
32.
176.
127.
176.
197.
“I/O Ports” on page
Table 11-5 on page
and
and
“Electrical Characteristics” on page
Table 22-48
114.
35.
154.
166.
Table
Table
166.
22-32, starting on
22-35, starting on
41.
and
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27.
142.
55.
Table
82,
97,
84,
96,
106,
144.
Table 11-6 on page 83
123.
84,
95,
106,
and
22-49.
111.
page
page
193.
194.
166.
and
“SPI
and
27