PIC18F23K20-I/MV Microchip Technology, PIC18F23K20-I/MV Datasheet - Page 313
![IC MCU 8BIT 8KB FLASH 28UQFN](/photos/12/13/121305/c04-152_mv_sml.jpg)
PIC18F23K20-I/MV
Manufacturer Part Number
PIC18F23K20-I/MV
Description
IC MCU 8BIT 8KB FLASH 28UQFN
Manufacturer
Microchip Technology
Series
PIC® XLP™ 18Fr
Specifications of PIC18F23K20-I/MV
Program Memory Type
FLASH
Program Memory Size
8KB (4K x 16)
Package / Case
28-UFQFN Exposed Pad
Core Processor
PIC
Core Size
8-Bit
Speed
64MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, HLVD, POR, PWM, WDT
Number Of I /o
24
Eeprom Size
256 x 8
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 11x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
PIC18F
Core
PIC
Data Bus Width
16 bit
Data Ram Size
768 B
Interface Type
MSSP, I2C, SPI, USART
Maximum Clock Frequency
64 MHz
Number Of Programmable I/os
25
Number Of Timers
4
Operating Supply Voltage
1.8 V to 3.6 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 10 Channel
A/d Bit Size
10 bit
A/d Channels Available
10
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
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23.3.2
The entire data EEPROM is protected from external
reads and writes by two bits: CPD and WRTD. CPD
inhibits external reads and writes of data EEPROM.
WRTD inhibits internal and external writes to data
EEPROM. The CPU can always read data EEPROM
under normal operation, regardless of the protection bit
settings.
23.3.3
The Configuration registers can be write-protected.
The WRTC bit controls protection of the Configuration
registers. In normal execution mode, the WRTC bit is
readable only. WRTC can only be written via ICSP or
an external programmer.
23.4
Eight memory locations (200000h-200007h) are
designated as ID locations, where the user can store
checksum or other code identification numbers. These
locations are both readable and writable during normal
execution through the TBLRD and TBLWT instructions
or during program/verify. The ID locations can be read
when the device is code-protected.
23.5
PIC18F2XK20/4XK20
programmed while in the end application circuit. This is
simply done with two lines for clock and data and three
other lines for power, ground and the programming
voltage. This allows customers to manufacture boards
with unprogrammed devices and then program the
microcontroller just before shipping the product. This
also allows the most recent firmware or a custom
firmware to be programmed.
23.6
When the DEBUG Configuration bit is programmed to
a ‘0’, the In-Circuit Debugger functionality is enabled.
This function allows simple debugging functions when
used with MPLAB
this feature enabled, some resources are not available
for general use. Table 23-4 shows which resources are
required by the background debugger.
TABLE 23-4:
2010 Microchip Technology Inc.
I/O pins:
Stack:
Program Memory:
Data Memory:
ID Locations
In-Circuit Debugger
In-Circuit Serial Programming
DATA EEPROM
CODE PROTECTION
CONFIGURATION REGISTER
PROTECTION
®
DEBUGGER RESOURCES
IDE. When the microcontroller has
devices
RB6, RB7
2 levels
512 bytes
10 bytes
can
be
serially
To use the In-Circuit Debugger function of the micro-
controller, the design must implement In-Circuit Serial
Programming connections to the following pins:
• MCLR/V
• V
• V
• RB7
• RB6
This will interface to the In-Circuit Debugger module
available from Microchip or one of the third party devel-
opment tool companies.
23.7
The LVP Configuration bit enables Single-Supply ICSP
Programming (formerly known as Low-Voltage ICSP
Programming or LVP). When Single-Supply Program-
ming is enabled, the microcontroller can be programmed
without requiring high voltage being applied to the
MCLR/V
dedicated to controlling Program mode entry and is not
available as a general purpose I/O pin.
While programming, using Single-Supply Programming
mode, V
normal execution mode. To enter Programming mode,
V
If Single-Supply ICSP Programming mode will not be
used, the LVP bit can be cleared. RB5/KBI1/PGM then
becomes available as the digital I/O pin, RB5. The LVP
bit may be set or cleared only when using standard
high-voltage programming (V
V
standard high-voltage programming is available and
must be used to program the device.
Memory that is not code-protected can be erased using
either a block erase, or erased row by row, then written
at any specified V
erased, a block erase is required.
PIC18F2XK20/4XK20
DD
PP
Note 1: High-voltage programming is always
DD
SS
/RE3 pin). Once LVP has been disabled, only the
is applied to the PGM pin.
PP
DD
2: By
3: When Single-Supply Programming is
4: When LVP is enabled, externally pull the
Single-Supply ICSP Programming
PP
/RE3 pin, but the RB5/KBI1/PGM pin is then
is applied to the MCLR/V
available, regardless of the state of the
LVP bit or the PGM pin, by applying V
to the MCLR pin.
enabled in unprogrammed devices (as
supplied from Microchip) and erased
devices.
enabled, the RB5 pin can no longer be
used as a general purpose I/O pin.
PGM pin to V
execution.
/RE3
DD
default,
. If code-protected memory is to be
SS
Single-Supply
to allow normal program
IHH
applied to the MCLR/
DS41303G-page 313
PP
/RE3 pin as in
ICSP
IHH
is
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