ATTINY24-20PU Atmel, ATTINY24-20PU Datasheet - Page 81

IC MCU AVR 2K FLASH 20MHZ 14-DIP

ATTINY24-20PU

Manufacturer Part Number
ATTINY24-20PU
Description
IC MCU AVR 2K FLASH 20MHZ 14-DIP
Manufacturer
Atmel
Series
AVR® ATtinyr
Datasheets

Specifications of ATTINY24-20PU

Core Processor
AVR
Core Size
8-Bit
Speed
20MHz
Connectivity
USI
Peripherals
Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
Number Of I /o
12
Program Memory Size
2KB (1K x 16)
Program Memory Type
FLASH
Eeprom Size
128 x 8
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
14-DIP (0.300", 7.62mm)
Processor Series
ATTINY2x
Core
AVR8
Data Bus Width
8 bit
Data Ram Size
128 B
Interface Type
SPI
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
12
Number Of Timers
2
Operating Supply Voltage
2.7 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
Through Hole
3rd Party Development Tools
EWAVR, EWAVR-BL
Development Tools By Supplier
ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT
Minimum Operating Temperature
- 40 C
On-chip Adc
8-ch x 10-bit
For Use With
ATSTK600-DIP40 - STK600 SOCKET/ADAPTER 40-PDIP770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAGATAVRISP2 - PROGRAMMER AVR IN SYSTEMATSTK505 - ADAPTER KIT FOR 14PIN AVR MCU
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
8006K–AVR–10/10
Table 11-3.
Note:
Table 11-4
rect PWM mode.
Table 11-4.
Note:
• Bits 5:4 – COM0B1, COM0B:0: Compare Match Output B Mode
These bits control the Output Compare pin (OC0B) behavior. If one or both of the COM0B1:0
bits are set, the OC0B output overrides the normal port functionality of the I/O pin it is connected
to. However, note that the Data Direction Register (DDR) bit corresponding to the OC0B pin
must be set in order to enable the output driver.
When OC0B is connected to the pin, the function of the COM0B1:0 bits depends on the
WGM02:0 bit setting.
are set to a normal or CTC mode (non-PWM).
Table 11-5.
COM0A1
COM0A1
COM0B1
0
0
1
1
0
0
1
1
0
0
1
1
1. A special case occurs when OCR0A equals TOP and COM0A1 is set. In this case, the Com-
1. A special case occurs when OCR0A equals TOP and COM0A1 is set. In this case, the Com-
pare Match is ignored, but the set or clear is done at BOTTOM. See
page 75
pare Match is ignored, but the set or clear is done at TOP. See
page 77
shows the COM0A1:0 bit functionality when the WGM02:0 bits are set to phase cor-
Compare Output Mode, Fast PWM Mode
Compare Output Mode, Phase Correct PWM Mode
Compare Output Mode, non-PWM Mode
COM0A0
COM0A0
COM0B0
for more details.
for more details.
0
1
0
1
0
1
0
1
0
1
0
1
Table 11-5
Description
Normal port operation, OC0A disconnected
WGM02 = 0: Normal Port Operation, OC0A Disconnected
WGM02 = 1: Toggle OC0A on Compare Match
Clear OC0A on Compare Match
Set OC0A at BOTTOM (non-inverting mode)
Set OC0A on Compare Match
Clear OC0A at BOTTOM (inverting mode)
Description
Normal port operation, OC0A disconnected.
WGM02 = 0: Normal Port Operation, OC0A Disconnected.
WGM02 = 1: Toggle OC0A on Compare Match.
Clear OC0A on Compare Match when up-counting. Set OC0A on
Compare Match when down-counting.
Set OC0A on Compare Match when up-counting. Clear OC0A on
Compare Match when down-counting.
Description
Normal port operation, OC0B disconnected.
Toggle OC0B on Compare Match
Clear OC0B on Compare Match
Set OC0B on Compare Match
shows the COM0B1:0 bit functionality when the WGM02:0 bits
(1)
(1)
“Phase Correct PWM Mode” on
ATtiny24/44/84
“Fast PWM Mode” on
81

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