PIC16LF1939-I/ML Microchip Technology, PIC16LF1939-I/ML Datasheet - Page 148

• Manufacturer Part Number: PIC16LF1939-I/ML
• Description: IC MCU 8BIT FLASH 44QFN
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 16Fr

Specifications of PIC16LF1939-I/ML

• Core Size: 8-Bit
• Program Memory Size: 28KB (16K x 14)
• Core Processor: PIC
• Speed: 32MHz
• Connectivity: I²C, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LCD, POR, PWM, WDT
• Number Of I /o: 36
• Program Memory Type: FLASH
• Eeprom Size: 256 x 8
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 3.6 V
• Data Converters: A/D 14x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 44-QFN
• Controller Family/series: PIC16LF
• Eeprom Memory Size: 256Byte
• Ram Memory Size: 1024Byte
• Cpu Speed: 32MHz
• No. Of Timers: 5
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

PIC16F193X/LF193X
REGISTER 12-22: WPUE: WEAK PULL-UP PORTE REGISTER
TABLE 12-6:
DS41364D-page 148
bit 7
Legend:
R = Readable bit
u = Bit is unchanged
‘1’ = Bit is set
bit 7-4
bit 3
bit 2-0
Note 1:
ADCON0
ANSELE
CCPxCON
LATE
LCDCON
LCDSE2
PORTE
TRISE
WPUE
Legend: x = unknown, u = unchanged, – = unimplemented locations read as ‘0’. Shaded cells are not used by
Note 1: These registers are not implemented on the PIC16F1933/1936/1938 devices, read as ‘0’.
Name
U-0
—
2:
Global WPUEN bit of the OPTION register must be cleared for individual pull-ups to be enabled.
The weak pull-up device is automatically disabled if the pin is in configured as an output.
PORTE.
LCDEN
Unimplemented: Read as ‘0’
WPUE: Weak Pull-up Register bit
1 = Pull-up enabled
0 = Pull-up disabled
Unimplemented: Read as ‘0’
SE23
Bit 7
SUMMARY OF REGISTERS ASSOCIATED WITH PORTE
—
—
—
—
—
—
PxM<1:0>
U-0
—
SLPEN
SE22
Bit 6
—
—
—
—
—
W = Writable bit
x = Bit is unknown
‘0’ = Bit is cleared
U-0
—
WERR
SE21
Bit 5
—
—
—
—
—
DCxB<1:0>
CHS<4:0>
U-0
Preliminary
—
SE20
Bit 4
—
—
—
—
—
—
U = Unimplemented bit, read as ‘0’
-n/n = Value at POR and BOR/Value at all other Resets
TRISE3
WPUE3
R/W-1/1
WPUE3
LATE3
SE19
Bit 3
RE3
—
CS<1:0>
TRISE2
ANSE2
LATE2
SE18
Bit 2
RE2
—
CCPxM<3:0>
U-0
—
GO/DONE
(1)
TRISE1
ANSE1
LATE1
SE17
Bit 1
RE1
 2009 Microchip Technology Inc.
—
LMUX<1:0>
U-0
—
TRISE0
ANSE0
ADON
LATE0
SE16
Bit 0
RE0
—
Register
on Page
U-0
—
161
231
147
329
146
148
147
333
146
bit 0