PIC16LF1939-I/ML Microchip Technology, PIC16LF1939-I/ML Datasheet - Page 301

IC MCU 8BIT FLASH 44QFN

PIC16LF1939-I/ML

Manufacturer Part Number
PIC16LF1939-I/ML
Description
IC MCU 8BIT FLASH 44QFN
Manufacturer
Microchip Technology
Series
PIC® XLP™ 16Fr
Datasheets

Specifications of PIC16LF1939-I/ML

Core Size
8-Bit
Program Memory Size
28KB (16K x 14)
Core Processor
PIC
Speed
32MHz
Connectivity
I²C, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LCD, POR, PWM, WDT
Number Of I /o
36
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 14x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
44-QFN
Controller Family/series
PIC16LF
Eeprom Memory Size
256Byte
Ram Memory Size
1024Byte
Cpu Speed
32MHz
No. Of Timers
5
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC16LF1939-I/ML
Manufacturer:
MICROCHIP
Quantity:
4 000
24.3
The Baud Rate Generator (BRG) is an 8-bit or 16-bit
timer that is dedicated to the support of both the
asynchronous and synchronous EUSART operation.
By default, the BRG operates in 8-bit mode. Setting the
BRG16 bit of the BAUDCON register selects 16-bit
mode.
The SPBRGH, SPBRGL register pair determines the
period of the free running baud rate timer. In
Asynchronous mode the multiplier of the baud rate
period is determined by both the BRGH bit of the TXSTA
register and the BRG16 bit of the BAUDCON register. In
Synchronous mode, the BRGH bit is ignored.
Table 24-3 contains the formulas for determining the
baud rate. Example 24-1 provides a sample calculation
for determining the baud rate and baud rate error.
Typical baud rates and error values for various
asynchronous modes have been computed for your
convenience and are shown in Table 24-3. It may be
advantageous to use the high baud rate (BRGH = 1),
or the 16-bit BRG (BRG16 = 1) to reduce the baud rate
error. The 16-bit BRG mode is used to achieve slow
baud rates for fast oscillator frequencies.
Writing a new value to the SPBRGH, SPBRGL register
pair causes the BRG timer to be reset (or cleared). This
ensures that the BRG does not wait for a timer overflow
before outputting the new baud rate.
If the system clock is changed during an active receive
operation, a receive error or data loss may result. To
avoid this problem, check the status of the RCIDL bit to
make sure that the receive operation is Idle before
changing the system clock.
 2009 Microchip Technology Inc.
EUSART Baud Rate Generator
(BRG)
Preliminary
EXAMPLE 24-1:
Calculated Baud Rate
For a device with F
of 9600, Asynchronous mode, 8-bit BRG:
Solving for SPBRGH:SPBRGL:
PIC16F193X/LF193X
Desired Baud Rate
Error
X
OSC
=
=
=
=
=
=
=
=
CALCULATING BAUD
RATE ERROR
Calc. Baud Rate Desired Baud Rate
------------------------------------------------------------------------------------------- -
-------------------------------------------------------------------- -
64 [SPBRGH:SPBRG]
--------------------------------------------- 1
9615
----------------------------------
-------------------------------------------- -
Desired Baud Rate
16000000
----------------------- -
----------------------- - 1
-------------------------- -
64 25
16000000
25.042
9615 9600
of 16 MHz, desired baud rate
9600
64
9600
F
+
O S C
64
Desired Baud Rate
1
=
F
25
OS C
DS41364D-page 301
=
0.16%
+
1

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