ATTINY84-20MU Atmel, ATTINY84-20MU Datasheet - Page 170

IC MCU AVR 8K FLASH 20MHZ 20-QFN

ATTINY84-20MU

Manufacturer Part Number
ATTINY84-20MU
Description
IC MCU AVR 8K FLASH 20MHZ 20-QFN
Manufacturer
Atmel
Series
AVR® ATtinyr
Datasheets

Specifications of ATTINY84-20MU

Core Processor
AVR
Core Size
8-Bit
Speed
20MHz
Connectivity
USI
Peripherals
Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
Number Of I /o
12
Program Memory Size
8KB (4K x 16)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
20-MLF®, QFN
Cpu Family
ATtiny
Device Core
AVR
Device Core Size
8b
Frequency (max)
20MHz
Interface Type
SPI/USI
Total Internal Ram Size
512Byte
# I/os (max)
12
Number Of Timers - General Purpose
2
Operating Supply Voltage (typ)
3.3/5V
Operating Supply Voltage (max)
5.5V
Operating Supply Voltage (min)
2.7V
On-chip Adc
8-chx10-bit
Instruction Set Architecture
RISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
20
Package Type
MLF
Processor Series
ATTINY8x
Core
AVR8
Data Bus Width
8 bit
Data Ram Size
512 B
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
12
Number Of Timers
2
Operating Supply Voltage
2.7 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWAVR, EWAVR-BL
Development Tools By Supplier
ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT
Minimum Operating Temperature
- 40 C
Package
20MLF
Family Name
ATtiny
Maximum Speed
20 MHz
For Use With
ATSTK600 - DEV KIT FOR AVR/AVR32770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAGATAVRISP2 - PROGRAMMER AVR IN SYSTEM
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ATTINY84-20MU
Manufacturer:
ATMEL
Quantity:
8 000
19.7.5
170
ATtiny24/44/84
Programming the EEPROM
Figure 19-4. Addressing the Flash which is Organized in Pages
Figure 19-5. High-voltage Serial Programming Waveforms
The EEPROM is organized in pages, see
EEPROM, the data is latched into a page buffer. This allows one page of data to be pro-
grammed simultaneously. The programming algorithm for the EEPROM Data memory is as
follows (refer to
SDO
PB0
PB1
PB2
PB3
1. Load Command “Write EEPROM”.
2. Load EEPROM Page Buffer.
3. Program EEPROM Page. Wait after Instr. 2 until SDO goes high for the “Page Program-
4. Repeat 2 through 3 until the entire EEPROM is programmed or until all data has been
5. End Page Programming by Loading Command “No Operation”.
SDI
SCI
SII
ming” cycle to finish.
programmed.
PROGRAM MEMORY
PROGRAM
COUNTER
PAGE
0
MSB
Table 19-16 on page
PAGE ADDRESS
WITHIN THE FLASH
MSB
MSB
1
PCMSB
2
PCPAGE
3
171):
4
PAGEMSB
PCWORD
Table 20-12 on page
5
WORD ADDRESS
WITHIN A PAGE
6
INSTRUCTION WORD
7
PAGE
LSB
LSB
LSB
8
183. When programming the
9
PCWORD[PAGEMSB:0]:
00
01
02
PAGEEND
10
8006K–AVR–10/10

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