PIC18F1320-I/P Microchip Technology, PIC18F1320-I/P Datasheet - Page 2
![IC MCU FLASH 4KX16 A/D 18-DIP](/photos/6/76/67657/18-dip_300mil__sml.jpg)
PIC18F1320-I/P
Manufacturer Part Number
PIC18F1320-I/P
Description
IC MCU FLASH 4KX16 A/D 18-DIP
Manufacturer
Microchip Technology
Series
PIC® 18Fr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC18F1220-ISO.pdf
(308 pages)
3.PIC18F1220-ISO.pdf
(8 pages)
4.PIC18F1220-ISO.pdf
(6 pages)
5.PIC18F1220-ISO.pdf
(10 pages)
6.PIC18F1220-ISO.pdf
(4 pages)
7.PIC18F1320-ISS.pdf
(36 pages)
8.PIC18F1220-EP.pdf
(310 pages)
Specifications of PIC18F1320-I/P
Program Memory Type
FLASH
Program Memory Size
8KB (4K x 16)
Package / Case
18-DIP (0.300", 7.62mm)
Core Processor
PIC
Core Size
8-Bit
Speed
40MHz
Connectivity
UART/USART
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
16
Eeprom Size
256 x 8
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
4.2 V ~ 5.5 V
Data Converters
A/D 7x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
PIC18F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
256 B
Interface Type
EUSART
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
16
Number Of Timers
4
Operating Supply Voltage
2 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
Through Hole
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, ICE4000, DM163014, DV164136
Minimum Operating Temperature
- 40 C
On-chip Adc
7-ch x 10-bit
Package
18PDIP
Device Core
PIC
Family Name
PIC18
Maximum Speed
40 MHz
Data Rom Size
256 B
Height
3.3 mm
Length
22.86 mm
Supply Voltage (max)
5.5 V
Supply Voltage (min)
4.2 V
Width
6.35 mm
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
DVA18XP180 - DEVICE ADAPTER 18F1320 PDIP 18LDACICE0202 - ADAPTER MPLABICE 18P 300 MILAC164010 - MODULE SKT PROMATEII DIP/SOIC
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC18F1320-I/P
Manufacturer:
Microchip Technology
Quantity:
1 809
Company:
Part Number:
PIC18F1320-I/P
Manufacturer:
BI
Quantity:
16
Part Number:
PIC18F1320-I/P
Manufacturer:
MICROCHI
Quantity:
20 000
PIC18F1220/1320
4. Module: INTOSC
5. Module: Internal Oscillator Block
DS80160F-page 2
Incrementing or decrementing the value in the
OSCTUNE register may not have the expected
effect of shifting the INTRC or INTOSC output
frequencies. The OSCTUNE values for which this
happens may vary with temperatures above 70°C.
Work around
None
Date Codes that pertain to this issue:
All engineering and production devices.
At high temperature (above 85°C) or low V
(below 2.5V), the IOFS bit (OSCCON<2>) may not
become set when the internal oscillator block is
selected as the system clock source for any
frequency above 31 kHz (OSCCON<6:4>
The INTOSC output will stabilize at 8 MHz;
however, the IOFS bit may not become set.
Work around
If time critical code is to be executed, it should be
delayed by 1 ms following the operation that
enables the 8 MHz INTOSC output from the
internal oscillator block.
Date Codes that pertain to this issue:
All engineering and production devices.
≠
000).
DD
6. Module: Internal Oscillator Block
If the INTRC clock source was not started at POR
(any V
clock source may not start or may require a long
delay when starting. The INTRC may not restart
when V
Features that depend on the operation of the
INTRC clock source may be affected. These
include the INTOSC output when exiting from
Sleep mode, the Watchdog Timer (WDT) if
enabled by firmware using the WDTCON register,
Two-Speed Start-ups during Reset or wake-up
from Sleep and the Fail-Safe Clock Monitor
(FSCM) when exiting Sleep mode.
The INTOSC frequency may rise very high (for
example, 9.5 MHz). The WDT and the FSCM may
simply not function. Two-Speed Start-ups may not
occur but execution will start once the primary
clock source becomes ready.
Work around
Several work arounds may be used.
1. Enable the WDT in Configuration register,
2. Configure the internal oscillator block as the
3. Any technique that starts the INTRC at Reset
4. Ensure that V
There may be other work arounds.
Date Codes that pertain to this issue:
All engineering and production devices.
CONFIG2H, and place a CLRWDT instruction
somewhere in the main loop.
primary clock source using Configuration
Register 1H.
and does not disable it may be used.
the INTRC clock source.
DD
DD
) and V
is lowered below 4.5V.
DD
DD
is greater than 4.5V, the INTRC
© 2006 Microchip Technology Inc.
is below 4.5V when starting