DSPIC33FJ12GP202-I/ML Microchip Technology, DSPIC33FJ12GP202-I/ML Datasheet - Page 108

• Manufacturer Part Number: DSPIC33FJ12GP202-I/ML
• Description: IC DSPIC MCU/DSP 12K 28QFN
• Manufacturer: Microchip Technology
• Series: dsPIC™ 33Fr

Specifications of DSPIC33FJ12GP202-I/ML

• Core Processor: dsPIC
• Core Size: 16-Bit
• Speed: 40 MIPs
• Connectivity: I²C, IrDA, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 21
• Program Memory Size: 12KB (12K x 8)
• Program Memory Type: FLASH
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 10x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 28-VQFN Exposed Pad, 28-HVQFN, 28-SQFN, 28-DHVQFN
• Core Frequency: 40MHz
• Core Supply Voltage: 2.75V
• Embedded Interface Type: I2C, JTAG, SPI, UART
• No. Of I/o's: 21
• Flash Memory Size: 12KB
• Supply Voltage Range: 3V To 3.6V
• Package: 28QFN EP
• Device Core: dsPIC
• Family Name: dsPIC33
• Maximum Speed: 40 MHz
• Operating Supply Voltage: 3.3 V
• Data Bus Width: 16 Bit
• Number Of Programmable I/os: 21
• Interface Type: I2C/SPI/UART
• On-chip Adc: 10-chx10-bit|10-chx12-bit
• Number Of Timers: 3
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AC164336 - MODULE SOCKET FOR PM3 28/44QFNDM240001 - BOARD DEMO PIC24/DSPIC33/PIC32
• Eeprom Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

dsPIC33FJ12GP201/202
REGISTER 9-2:
DS70264D-page 106
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15
bit 14
bit 13-10
bit 9
bit 8
bit 7-2
bit 1
bit 0
IC8MD
R/W-0
U-0
—
IC8MD: Input Capture 8 Module Disable bit
1 = Input Capture 8 module is disabled
0 = Input Capture 8 module is enabled
IC7MD: Input Capture 2 Module Disable bit
1 = Input Capture 7 module is disabled
0 = Input Capture 7 module is enabled
Unimplemented: Read as ‘0’
IC2MD: Input Capture 2 Module Disable bit
1 = Input Capture 2 module is disabled
0 = Input Capture 2 module is enabled
IC1MD: Input Capture 1 Module Disable bit
1 = Input Capture 1 module is disabled
0 = Input Capture 1 module is enabled
Unimplemented: Read as ‘0’
OC2MD: Output Compare 2 Module Disable bit
1 = Output Compare 2 module is disabled
0 = Output Compare 2 module is enabled
OC1MD: Output Compare 1 Module Disable bit
1 = Output Compare 1 module is disabled
0 = Output Compare 1 module is enabled
IC7MD
R/W-0
U-0
—
PMD2: PERIPHERAL MODULE DISABLE CONTROL REGISTER 2
W = Writable bit
‘1’ = Bit is set
U-0
U-0
—
—
U-0
U-0
—
—
Preliminary
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
U-0
U-0
—
—
U-0
U-0
—
—
© 2009 Microchip Technology Inc.
x = Bit is unknown
OC2MD
IC2MD
R/W-0
R/W-0
OC1MD
IC1MD
R/W-0
R/W-0
bit 8
bit 0