DSPIC33FJ12GP202-I/ML Microchip Technology, DSPIC33FJ12GP202-I/ML Datasheet - Page 216

• Manufacturer Part Number: DSPIC33FJ12GP202-I/ML
• Description: IC DSPIC MCU/DSP 12K 28QFN
• Manufacturer: Microchip Technology
• Series: dsPIC™ 33Fr

Specifications of DSPIC33FJ12GP202-I/ML

• Core Processor: dsPIC
• Core Size: 16-Bit
• Speed: 40 MIPs
• Connectivity: I²C, IrDA, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 21
• Program Memory Size: 12KB (12K x 8)
• Program Memory Type: FLASH
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 10x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 28-VQFN Exposed Pad, 28-HVQFN, 28-SQFN, 28-DHVQFN
• Core Frequency: 40MHz
• Core Supply Voltage: 2.75V
• Embedded Interface Type: I2C, JTAG, SPI, UART
• No. Of I/o's: 21
• Flash Memory Size: 12KB
• Supply Voltage Range: 3V To 3.6V
• Package: 28QFN EP
• Device Core: dsPIC
• Family Name: dsPIC33
• Maximum Speed: 40 MHz
• Operating Supply Voltage: 3.3 V
• Data Bus Width: 16 Bit
• Number Of Programmable I/os: 21
• Interface Type: I2C/SPI/UART
• On-chip Adc: 10-chx10-bit|10-chx12-bit
• Number Of Timers: 3
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AC164336 - MODULE SOCKET FOR PM3 28/44QFNDM240001 - BOARD DEMO PIC24/DSPIC33/PIC32
• Eeprom Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

dsPIC33FJ12GP201/202
TABLE 22-31: SPIx MODULE SLAVE MODE (CKE = 1) TIMING REQUIREMENTS (CONTINUED)
FIGURE 22-13:
FIGURE 22-14:
DS70264D-page 214
AC CHARACTERISTICS
SP50
SP51
SP52
SP60
Note 1:
Param
SCLx
Note: Refer to Figure 22-1 for load conditions.
SDAx
No.
Note: Refer to Figure 22-1 for load conditions.
2:
3:
4:
SCLx
SDAx
In
SDAx
Out
TssL2scH,
TssL2scL
TssH2doZ SSx ↑ to SDO
TscH2ssH
TscL2ssH
TssL2doV SDOx Data Output Valid after
Symbol
These parameters are characterized by similarity, but are not tested in manufacturing.
Data in “Typ” column is at 3.3V, 25°C unless otherwise stated.
The minimum clock period for SCKx is 100 ns. The clock generated in Master mode must not violate this
specification.
Assumes 50 pF load on all SPIx pins.
IM30
SSx ↓ to SCKx ↓ or SCKx ↑
Input
High-Impedance
SSx ↑ after SCKx Edge
SSx Edge
IM11
Condition
I
I
2
2
Cx BUS START/STOP BITS TIMING CHARACTERISTICS (MASTER MODE)
Start
Cx BUS DATA TIMING CHARACTERISTICS (MASTER MODE)
IM20
IM10
IM31
Characteristic
IM40
X
Output
(1)
IM11
IM26
Preliminary
1.5 T
Standard Operating Conditions: 3.0V to 3.6V
(unless otherwise stated)
Operating temperature
IM40
IM10
Min
120
10
CY
—
+ 40
IM25
Typ
—
—
—
—
(2)
Max
50
50
—
—
-40°C ≤ T
-40°C ≤ T
IM33
© 2009 Microchip Technology Inc.
Condition
Units
IM33
ns
ns
ns
ns
Stop
A
A
IM21
≤ +85°C for Industrial
≤ +125°C for Extended
IM34
See Note 4
IM45
Conditions
—
—
—