DSPIC30F2012-30I/SP Microchip Technology, DSPIC30F2012-30I/SP Datasheet - Page 15
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DSPIC30F2012-30I/SP
Manufacturer Part Number
DSPIC30F2012-30I/SP
Description
IC DSPIC MCU/DSP 12K 28DIP
Manufacturer
Microchip Technology
Series
dsPIC™ 30Fr
Datasheets
1.DSPIC30F2011-20ISO.pdf
(66 pages)
2.DSPIC30F2011-20ISO.pdf
(210 pages)
3.DSPIC30F2011-20ISO.pdf
(14 pages)
4.DSPIC30F2011-20ISO.pdf
(6 pages)
5.DSPIC30F2011-20ISO.pdf
(18 pages)
6.DSPIC30F2012-30ISO.pdf
(205 pages)
7.DSPIC30F2011-20IP.pdf
(206 pages)
Specifications of DSPIC30F2012-30I/SP
Program Memory Type
FLASH
Program Memory Size
12KB (4K x 24)
Package / Case
28-DIP (0.300", 7.62mm)
Core Processor
dsPIC
Core Size
16-Bit
Speed
30 MIPs
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
20
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.5 V ~ 5.5 V
Data Converters
A/D 10x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Product
DSCs
Data Bus Width
16 bit
Processor Series
DSPIC30F
Core
dsPIC
Maximum Clock Frequency
30 MHz
Number Of Programmable I/os
12
Data Ram Size
1 KB
Maximum Operating Temperature
+ 85 C
Mounting Style
Through Hole
3rd Party Development Tools
52713-733, 52714-737, 53276-922, EWDSPIC
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE4000, DM240002, DM300027, DM330011, DM300018, DM183021
Minimum Operating Temperature
- 40 C
Core Frequency
30MHz
Embedded Interface Type
I2C, SPI, UART
No. Of I/o's
20
Flash Memory Size
12KB
Supply Voltage Range
2.5V To 5.5V
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
DV164005 - KIT ICD2 SIMPLE SUIT W/USB CABLE
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
DSPIC30F201230ISP
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DSPIC30F2012-30I/SP
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
FIGURE 1-4:
© 2008 Microchip Technology Inc.
Program Memory
Controller
Address Latch
Data EEPROM
Interrupt
Data Latch
OSC1/CLKI
(24 Kbytes)
(1 Kbytes)
24
Generation
Timing
Instruction
Decode &
Control
AV
16
V
MCLR
DD
DD
24
24
dsPIC30F3013 BLOCK DIAGRAM
, V
, AV
Control Block
Data Access
PSV & Table
24
12-bit ADC
SS
SS
16
Control
Start-up Timer
Stack
Low-Voltage
Logic
PCU
Program Counter
POR/BOR
Watchdog
Power-up
Oscillator
Detect
Y Data Bus
Timer
Reset
Timer
8
ROM Latch
PCH
Capture
Module
Timers
Input
IR
dsPIC30F2011/2012/3012/3013
Control
Logic
Loop
16
PCL
Decode
16
Engine
16
DSP
Compare
Module
Output
SPI1
(1 Kbytes)
Data Latch
Y AGU
Address
Y Data
Effective Address
Latch
RAM
16
16
16
W Reg Array
16
16 x 16
ALU<16>
16
16
16
X RAGU
X WAGU
X Data Bus
16
Data Latch
(1 Kbytes)
Divide
UART1,
UART2
Address
Unit
X Data
I
Latch
2
RAM
C™
16
16
16
16
PORTF
PORTB
PORTC
PORTD
EMUC2/IC1/INT1/RD8
IC2/INT2/RD9
EMUD3/AN0/V
EMUC3/AN1/V
AN2/SS1/LVDIN/CN4/RB2
AN3/CN5/RB3
AN4/CN6/RB4
AN5/CN7/RB5
AN6/OCFA/RB6
EMUD2/AN7/RB7
AN8/OC1/RB8
AN9/OC2/RB9
EMUD1/SOSCI/T2CK/U1ATX/CN1/RC13
EMUC1/SOSCO/T1CK/U1ARX/CN0/RC14
OSC2/CLKO/RC15
PGC/EMUC/U1RX/SDI1/SDA/RF2
PGD/EMUD/U1TX/SDO1/SCL/RF3
U2RX/CN17/RF4
U2TX/CN18/RF5
SCK1/INT0/RF6
REF
REF
+/CN2/RB0
-/CN3/RB1
DS70139F-page 15