DSPIC30F2012-30I/SP Microchip Technology, DSPIC30F2012-30I/SP Datasheet - Page 201

• Manufacturer Part Number: DSPIC30F2012-30I/SP
• Description: IC DSPIC MCU/DSP 12K 28DIP
• Manufacturer: Microchip Technology
• Series: dsPIC™ 30Fr

Specifications of DSPIC30F2012-30I/SP

• Program Memory Type: FLASH
• Program Memory Size: 12KB (4K x 24)
• Package / Case: 28-DIP (0.300", 7.62mm)
• Core Processor: dsPIC
• Core Size: 16-Bit
• Speed: 30 MIPs
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 20
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 2.5 V ~ 5.5 V
• Data Converters: A/D 10x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Product: DSCs
• Data Bus Width: 16 bit
• Processor Series: DSPIC30F
• Core: dsPIC
• Maximum Clock Frequency: 30 MHz
• Number Of Programmable I/os: 12
• Data Ram Size: 1 KB
• Maximum Operating Temperature: + 85 C
• Mounting Style: Through Hole
• 3rd Party Development Tools: 52713-733, 52714-737, 53276-922, EWDSPIC
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE4000, DM240002, DM300027, DM330011, DM300018, DM183021
• Minimum Operating Temperature: - 40 C
• Core Frequency: 30MHz
• Embedded Interface Type: I2C, SPI, UART
• No. Of I/o's: 20
• Flash Memory Size: 12KB
• Supply Voltage Range: 2.5V To 5.5V
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: DV164005 - KIT ICD2 SIMPLE SUIT W/USB CABLE
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: DSPIC30F201230ISP

Timing Specifications
Trap Vectors ....................................................................... 69
U
UART Module
UART Operation
Unit ID Locations............................................................... 121
Universal Asynchronous Receiver Transmitter (UART) Mod-
W
Wake-up from Sleep ......................................................... 121
Wake-up from Sleep and Idle ............................................. 70
Watchdog Timer
Watchdog Timer (WDT) ............................................ 121, 131
WWW Address.................................................................. 200
WWW, On-Line Support ..................................................... 10
© 2008 Microchip Technology Inc.
Input Capture ............................................................ 167
Oscillator Start-up Timer ........................................... 163
Output Compare Module........................................... 168
Power-up Timer ........................................................ 163
Reset......................................................................... 163
Simple OC/PWM Mode............................................. 169
SPI Module
Type A Timer External Clock .................................... 165
Type B Timer External Clock .................................... 166
Type C Timer External Clock .................................... 166
Watchdog Timer........................................................ 163
PLL Clock.................................................................. 159
Address Detect Mode ............................................... 107
Auto-Baud Support ................................................... 108
Baud Rate Generator................................................ 107
Enabling and Setting Up ........................................... 105
Framing Error (FERR)............................................... 107
Idle Status ................................................................. 107
Loopback Mode ........................................................ 107
Operation During CPU Sleep and Idle Modes .......... 108
Overview ................................................................... 103
Parity Error (PERR) .................................................. 107
Receive Break........................................................... 107
Receive Buffer (UxRXB) ........................................... 106
Receive Buffer Overrun Error (OERR Bit) ................ 106
Receive Interrupt....................................................... 106
Receiving Data.......................................................... 106
Receiving in 8-bit or 9-bit Data Mode........................ 106
Reception Error Handling.......................................... 106
Transmit Break.......................................................... 106
Transmit Buffer (UxTXB)........................................... 105
Transmit Interrupt...................................................... 106
Transmitting Data...................................................... 105
Transmitting in 8-bit Data Mode................................ 105
Transmitting in 9-bit Data Mode................................ 105
UART1 Register Map................................................ 109
UART2 Register Map................................................ 109
Idle Mode .................................................................. 108
Sleep Mode............................................................... 108
ule ............................................................................. 103
Timing Characteristics .............................................. 163
Timing Requirements................................................ 163
Enabling and Disabling ............................................. 131
Operation .................................................................. 131
Master Mode (CKE = 0) .................................... 170
Master Mode (CKE = 1) .................................... 171
Slave Mode (CKE = 0) ...................................... 172
Slave Mode (CKE = 1) ...................................... 174
dsPIC30F2011/2012/3012/3013
DS70139F-page 201