PIC18F27J13-I/SO Microchip Technology, PIC18F27J13-I/SO Datasheet - Page 132

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PIC18F27J13-I/SO

Manufacturer Part Number
PIC18F27J13-I/SO
Description
IC PIC MCU 128KB FLASH 28SOIC
Manufacturer
Microchip Technology
Series
PIC® XLP™ 18Fr

Specifications of PIC18F27J13-I/SO

Core Size
8-Bit
Program Memory Size
128KB (64K x 16)
Core Processor
PIC
Speed
48MHz
Connectivity
I²C, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
22
Program Memory Type
FLASH
Ram Size
3.8K x 8
Voltage - Supply (vcc/vdd)
2.15 V ~ 3.6 V
Data Converters
A/D 10x10b/12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Controller Family/series
PIC18
Cpu Speed
48MHz
Digital Ic Case Style
SOIC
Supply Voltage Range
1.8V To 5.5V
Embedded Interface Type
I2C, SPI, USART
Rohs Compliant
Yes
Processor Series
PIC18F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
4 KB
Interface Type
I2C, SPI, EUSART
Maximum Clock Frequency
48 MHz
Number Of Programmable I/os
19
Number Of Timers
8
Operating Supply Voltage
2 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
DM164128, DM180021, DM183026-2, DV164131, MA180030, DM183022, DM183032, DV164136, MA180024
Minimum Operating Temperature
- 40 C
On-chip Adc
12 bit, 10 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
MA180030 - BOARD DEMO PIC18F47J13 FS USBMA180029 - BOARD DEMO PIC18F47J53 FS USB
Eeprom Size
-
Lead Free Status / Rohs Status
 Details

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC18F27J13-I/SO
Manufacturer:
ST
Quantity:
53 700
PIC18F47J13 FAMILY
REGISTER 9-12:
REGISTER 9-13:
DS39974A-page 132
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7-1
bit 0
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7-6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
CCP10IE
R/W-0
U-0
CCP10IE:CCP4IE: CCP<10:4> Interrupt Enable bits
1 = Enabled
0 = Disabled
CCP3IE: ECCP3 Interrupt Enable bit
1 = Enabled
0 = Disabled
Unimplemented: Read as ‘0’
CM3IE: Comparator 3 Receive Interrupt Enable bit
1 = Enabled
0 = Disabled
TMR8IE: TMR8 to PR8 Match Interrupt Enable bit
1 = Enabled
0 = Disabled
TMR6IE: TMR6 to PR6 Match Interrupt Enable bit
1 = Enabled
0 = Disabled
TMR5IE: TMR5 Overflow Interrupt Enable bit
1 = Enabled
0 = Disabled
TMR5GIE: TMR5 Gate Interrupt Enable bit
1 = Enabled
0 = Disabled
TMR1GIE: TMR1 Gate Interrupt Enable bit
1 = Enabled
0 = Disabled
CCP9IE
R/W-0
U-0
PIE4: PERIPHERAL INTERRUPT ENABLE REGISTER 4 (ACCESS F8Eh)
PIE5: PERIPHERAL INTERRUPT ENABLE REGISTER 5 (ACCESS F91h)
W = Writable bit
‘1’ = Bit is set
W = Writable bit
‘1’ = Bit is set
CCP8IE
CM3IE
R/W-0
R/W-0
TMR8IE
CCP7IE
R/W-0
R/W-0
Preliminary
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
CCP6IE
TMR6IE
R/W-0
R/W-0
CCP5IE
TMR5IE
R/W-0
R/W-0
 2010 Microchip Technology Inc.
x = Bit is unknown
x = Bit is unknown
TMR5GIE
CCP4IE
R/W-0
R/W-0
TMR1GIE
CCP3IE
R/W-0
R/W-0
bit 0
bit 0

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