PIC18F27J13-I/SO Microchip Technology, PIC18F27J13-I/SO Datasheet - Page 417

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PIC18F27J13-I/SO

Manufacturer Part Number
PIC18F27J13-I/SO
Description
IC PIC MCU 128KB FLASH 28SOIC
Manufacturer
Microchip Technology
Series
PIC® XLP™ 18Fr

Specifications of PIC18F27J13-I/SO

Core Size
8-Bit
Program Memory Size
128KB (64K x 16)
Core Processor
PIC
Speed
48MHz
Connectivity
I²C, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
22
Program Memory Type
FLASH
Ram Size
3.8K x 8
Voltage - Supply (vcc/vdd)
2.15 V ~ 3.6 V
Data Converters
A/D 10x10b/12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Controller Family/series
PIC18
Cpu Speed
48MHz
Digital Ic Case Style
SOIC
Supply Voltage Range
1.8V To 5.5V
Embedded Interface Type
I2C, SPI, USART
Rohs Compliant
Yes
Processor Series
PIC18F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
4 KB
Interface Type
I2C, SPI, EUSART
Maximum Clock Frequency
48 MHz
Number Of Programmable I/os
19
Number Of Timers
8
Operating Supply Voltage
2 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
DM164128, DM180021, DM183026-2, DV164131, MA180030, DM183022, DM183032, DV164136, MA180024
Minimum Operating Temperature
- 40 C
On-chip Adc
12 bit, 10 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
MA180030 - BOARD DEMO PIC18F47J13 FS USBMA180029 - BOARD DEMO PIC18F47J53 FS USB
Eeprom Size
-
Lead Free Status / Rohs Status
 Details

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC18F27J13-I/SO
Manufacturer:
ST
Quantity:
53 700
REGISTER 27-1:
 2010 Microchip Technology Inc.
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7
bit 6
bit 5
bit 4
bit 3-1
bit 0
R/WO-1
DEBUG
DEBUG: Background Debugger Enable bit
1 = Background debugger is disabled; RB6 and RB7 are configured as general purpose I/O pins
0 = Background debugger is enabled; RB6 and RB7 are dedicated to In-Circuit Debug
XINST: Extended Instruction Set Enable bit
1 = Instruction set extension and Indexed Addressing mode are enabled
0 = Instruction set extension and Indexed Addressing mode are disabled
STVREN: Stack Overflow/Underflow Reset Enable bit
1 = Reset on stack overflow/underflow is enabled
0 = Reset on stack overflow/underflow is disabled
CFGPLLEN: PLL Enable bit
1 = PLL is disabled until firmware sets the PLLEN bit at run time (OSCTUNE<6>)
0 = PLL is enabled at start-up
PLLDIV<2:0>: Oscillator Selection bits
Divider must be configured to provide a 4 MHz input into the 96 MHz PLL. These bits have no effect
111 = No divide – oscillator is used directly (4 MHz input)
110 = Oscillator divided by 2 (8 MHz input)
101 = Oscillator divided by 3 (12 MHz input)
100 = Oscillator divided by 4 (16 MHz input)
011 = Oscillator divided by 5 (20 MHz input)
010 = Oscillator divided by 6 (24 MHz input)
001 = Oscillator divided by 10 (40 MHz input)
000 = Oscillator divided by 12 (48 MHz input)
WDTEN: Watchdog Timer Enable bit
1 = WDT is enabled
0 = WDT is disabled (control is placed on the SWDTEN bit)
R/WO-1
XINST
on 4x PLL operation.
CONFIG1L: CONFIGURATION REGISTER 1 LOW (BYTE ADDRESS 300000h)
WO = Write-Once bit
‘1’ = Bit is set
STVREN
R/WO-1
CFGPLLEN
R/WO-1
Preliminary
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
PIC18F47J13 FAMILY
PLLDIV2
R/WO-1
PLLDIV1
R/WO-1
x = Bit is unknown
PLLDIV0
R/WO-1
DS39974A-page 417
R/WO-1
WDTEN
bit 0

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