PIC24FJ64GA002-I/SO Microchip Technology, PIC24FJ64GA002-I/SO Datasheet
PIC24FJ64GA002-I/SO
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PIC24FJ64GA002-I/SO Summary of contents
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... Control Logic................................................................................................................ 30-8 30.6 Advantages of Programmable CRC Module .............................................................. 30-10 30.8 Operation in Power Save Modes ............................................................................... 30-12 30.7 Application of CRC Module........................................................................................ 30-10 30.9 Register Maps............................................................................................................ 30-13 30.10 Related Application Notes.......................................................................................... 30-14 30.11 Revision History ......................................................................................................... 30-15 © 2006 Microchip Technology Inc. Advance Information 30 DS39714A-page 30-1 ...
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... The primary features of the programmable CRC module are: • Programmable bit length for the CRC generator polynomial (up to 16-bit length) • Programmable CRC generator polynomial • Interrupt output • 8-deep, 16-bit or 16-deep, 8-bit FIFO for data input DS39714A-page x1) + (1* x0 Advance Information © 2006 Microchip Technology Inc. ...
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... The CRCXOR register (Register 30-2) is used to define the generator polynomial by selecting the terms to be used. The CRCDAT and CRCWDAT registers are buffers for data input and result output, respectively. © 2006 Microchip Technology Inc. CRC Result Read CRC Result Write Serial Data Out ...
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... DS39714A-page 30-4 R-0 R-0 R-0 VWORD4 VWORD3 VWORD2 R/W-0 R/W-0 R/W-0 CRCGO PLEN3 PLEN2 U = Unimplemented bit, read as ‘0’ ‘0’ = Bit is cleared Advance Information R-0 R-0 VWORD1 VWORD0 bit 8 R/W-0 R/W-0 PLEN1 PLEN0 bit Bit is unknown © 2006 Microchip Technology Inc. ...
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... Bit is set bit 15-1 X15:X1: XOR of Polynomial Term n Enable bits 1 = Include (XOR) the nth term ( not include x in the polynomial bit 0 Unimplemented: Read as ‘0’ © 2006 Microchip Technology Inc. R/W-0 R/W-0 R/W-0 X12 X11 X10 R/W-0 R/W-0 R/W-0 ...
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... PLEN<3:0> 0 Hold X1 XOR 0 Out In D Bit 0 OUT 1 clk DS39714A-page 30 CRC Shift Register Hold Hold X2 Out 0 Out In In Bit 2 Bit 1 1 clk clk CRC Write Bus Advance Information 15 Hold X3 X15 0 0 Out In Bit clk CRC Read Bus © 2006 Microchip Technology Inc. ...
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... Note: The x bit in the CRCXOR register is omitted and is always assumed to be ‘1 Least Significant bit of ‘0’ or ‘1’ (e.g., 1020h or 1021h) has the same effect on the CRC calculation. © 2006 Microchip Technology Inc. n and the Least Significant bit is represented coefficient is omitted and understood to be ‘1’. Hence, only the ...
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... FIFO, the last odd byte is never shifted out, and the CRCMPT bit always remains at ‘0’, indicating that the FIFO is not empty. DS39714A-page 30-8 ≤ 7, every byte write into the FIFO increments VWORD by one two, for Advance Information © 2006 Microchip Technology Inc. ...
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... FIFO is lost and the new data is written into the first location of the FIFO. Remaining locations of the FIFO are empty and new data can be written into the empty locations. © 2006 Microchip Technology Inc. Advance Information 30 DS39714A-page 30-9 ...
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... When CRCMPT is set, clear the CRCGO bit and read the result byte from the CRCWDAT register. 8. For a partial result (CRC calculation is done but the FINAL_CALCULATION flag is not set), pass the partial result to the next calculation process. DS39714A-page 30-10 Advance Information © 2006 Microchip Technology Inc. ...
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... For a partial result (CRC calculation is done but the FINAL_CALCULATION flag is not set), pass the partial result to the next calculation process. Note: If the length of the polynomial is 16 bits, the CRC module expects an integer multiple of 16 bits in the FIFO © 2006 Microchip Technology Inc. Advance Information 30 DS39714A-page 30-11 ...
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... To continue full module operation in Idle mode, the CSIDL bit must be cleared prior to entry into the mode. If CSIDL = 1, the module behaves the same way as it does in Sleep mode; pending interrupt events will be passed on, even though the module clocks are not available. DS39714A-page 30-12 Advance Information © 2006 Microchip Technology Inc. ...
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... Section 30. Programmable Cyclic Redundancy Check (CRC) © 2006 Microchip Technology Inc. Advance Information 30 DS39714A-page 30-13 ...
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... CRC are: Title No related application notes at this time. Note: Please visit the Microchip web site (www.microchip.com) for additional application notes and code examples for the PIC24F family of devices. DS39714A-page 30-14 Advance Information Application Note # © 2006 Microchip Technology Inc. ...
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... Section 30. Programmable Cyclic Redundancy Check (CRC) 30.11 REVISION HISTORY Revision A (November 2006) This is the initial released revision of this document. © 2006 Microchip Technology Inc. Advance Information 30 DS39714A-page 30-15 ...
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... PIC24F Family Reference Manual NOTES: DS39714A-page 30-16 Advance Information © 2006 Microchip Technology Inc. ...