PIC18F27J13-I/SP Microchip Technology, PIC18F27J13-I/SP Datasheet - Page 132

• Manufacturer Part Number: PIC18F27J13-I/SP
• Description: IC PIC MCU 128KB FLASH 28SPDIP
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 18Fr

Specifications of PIC18F27J13-I/SP

• Core Size: 8-Bit
• Program Memory Size: 128KB (64K x 16)
• Core Processor: PIC
• Speed: 48MHz
• Connectivity: I²C, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 22
• Program Memory Type: FLASH
• Ram Size: 3.8K x 8
• Voltage - Supply (vcc/vdd): 2.15 V ~ 3.6 V
• Data Converters: A/D 10x10b/12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Controller Family/series: PIC18
• Cpu Speed: 48MHz
• Digital Ic Case Style: DIP
• Supply Voltage Range: 1.8V To 5.5V
• Embedded Interface Type: I2C, SPI, USART
• Rohs Compliant: Yes
• Core: PIC
• Processor Series: PIC18F
• Data Bus Width: 8 bit
• Maximum Clock Frequency: 48 MHz
• Data Ram Size: 3.76 KB
• On-chip Adc: Yes
• Number Of Programmable I/os: 2
• Number Of Timers: 8
• Operating Supply Voltage: 2.15 V to 3.6 V
• Operating Temperature Range: - 40 C to + 85 C
• A/d Bit Size: 12 bit
• A/d Channels Available: 10
• Height: 3.43 mm
• Interface Type: I2C, SPI, USART
• Length: 34.4 mm
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Supply Voltage (max): 3.6 V
• Supply Voltage (min): 2.15 V
• Width: 7.24 mm
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: MA180030 - BOARD DEMO PIC18F47J13 FS USBMA180029 - BOARD DEMO PIC18F47J53 FS USB
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

PIC18F47J13 FAMILY
REGISTER 9-12:
REGISTER 9-13:
DS39974A-page 132
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7-1
bit 0
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7-6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
CCP10IE
R/W-0
U-0
—
CCP10IE:CCP4IE: CCP<10:4> Interrupt Enable bits
1 = Enabled
0 = Disabled
CCP3IE: ECCP3 Interrupt Enable bit
1 = Enabled
0 = Disabled
Unimplemented: Read as ‘0’
CM3IE: Comparator 3 Receive Interrupt Enable bit
1 = Enabled
0 = Disabled
TMR8IE: TMR8 to PR8 Match Interrupt Enable bit
1 = Enabled
0 = Disabled
TMR6IE: TMR6 to PR6 Match Interrupt Enable bit
1 = Enabled
0 = Disabled
TMR5IE: TMR5 Overflow Interrupt Enable bit
1 = Enabled
0 = Disabled
TMR5GIE: TMR5 Gate Interrupt Enable bit
1 = Enabled
0 = Disabled
TMR1GIE: TMR1 Gate Interrupt Enable bit
1 = Enabled
0 = Disabled
CCP9IE
R/W-0
U-0
—
PIE4: PERIPHERAL INTERRUPT ENABLE REGISTER 4 (ACCESS F8Eh)
PIE5: PERIPHERAL INTERRUPT ENABLE REGISTER 5 (ACCESS F91h)
W = Writable bit
‘1’ = Bit is set
W = Writable bit
‘1’ = Bit is set
CCP8IE
CM3IE
R/W-0
R/W-0
TMR8IE
CCP7IE
R/W-0
R/W-0
Preliminary
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
CCP6IE
TMR6IE
R/W-0
R/W-0
CCP5IE
TMR5IE
R/W-0
R/W-0
 2010 Microchip Technology Inc.
x = Bit is unknown
x = Bit is unknown
TMR5GIE
CCP4IE
R/W-0
R/W-0
TMR1GIE
CCP3IE
R/W-0
R/W-0
bit 0
bit 0