PIC18F27J13-I/SP Microchip Technology, PIC18F27J13-I/SP Datasheet - Page 136

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PIC18F27J13-I/SP

Manufacturer Part Number
PIC18F27J13-I/SP
Description
IC PIC MCU 128KB FLASH 28SPDIP
Manufacturer
Microchip Technology
Series
PIC® XLP™ 18Fr

Specifications of PIC18F27J13-I/SP

Core Size
8-Bit
Program Memory Size
128KB (64K x 16)
Core Processor
PIC
Speed
48MHz
Connectivity
I²C, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
22
Program Memory Type
FLASH
Ram Size
3.8K x 8
Voltage - Supply (vcc/vdd)
2.15 V ~ 3.6 V
Data Converters
A/D 10x10b/12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Controller Family/series
PIC18
Cpu Speed
48MHz
Digital Ic Case Style
DIP
Supply Voltage Range
1.8V To 5.5V
Embedded Interface Type
I2C, SPI, USART
Rohs Compliant
Yes
Core
PIC
Processor Series
PIC18F
Data Bus Width
8 bit
Maximum Clock Frequency
48 MHz
Data Ram Size
3.76 KB
On-chip Adc
Yes
Number Of Programmable I/os
2
Number Of Timers
8
Operating Supply Voltage
2.15 V to 3.6 V
Operating Temperature Range
- 40 C to + 85 C
A/d Bit Size
12 bit
A/d Channels Available
10
Height
3.43 mm
Interface Type
I2C, SPI, USART
Length
34.4 mm
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Supply Voltage (max)
3.6 V
Supply Voltage (min)
2.15 V
Width
7.24 mm
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
MA180030 - BOARD DEMO PIC18F47J13 FS USBMA180029 - BOARD DEMO PIC18F47J53 FS USB
Eeprom Size
-
Lead Free Status / Rohs Status
 Details
PIC18F47J13 FAMILY
REGISTER 9-17:
REGISTER 9-18:
DS39974A-page 136
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7-1
bit 0
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7-6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
CCP10IP
R/W-1
U-0
CCP10IP:CCP4IP: CCP<10:4> Interrupt Priority bits
1 = High priority
0 = Low priority
CCP3IP: ECCP3 Interrupt Priority bit
1 = High priority
0 = Low priority
Unimplemented: Read as ‘0’
CM3IP: Comparator 3 Interrupt Priority bit
1 = High priority
0 = Low priority
TMR8IP: TMR8 to PR8 Match Interrupt Priority bit
1 = High priority
0 = Low priority
TMR6IP: TMR6 to PR6 Match Interrupt Priority bit
1 = High priority
0 = Low priority
TMR5IP: TMR5 Overflow Interrupt Priority bit
1 = High priority
0 = Low priority
TMR5GIP: TMR5 Gate Interrupt Priority bit
1 = High priority
0 = Low priority
TMR1GIP: TMR1 Gate Interrupt Priority bit
1 = High priority
0 = Low priority
CCP9IP
R/W-1
U-0
IPR4: PERIPHERAL INTERRUPT PRIORITY REGISTER 4 (ACCESS F90h)
IPR5: PERIPHERAL INTERRUPT PRIORITY REGISTER 5 (ACCESS F99h)
W = Writable bit
‘1’ = Bit is set
W = Writable bit
‘1’ = Bit is set
CCP8IP
CM3IP
R/W-1
R/W-1
TMR8IP
CCP7IP
R/W-1
R/W-1
Preliminary
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
CCP6IP
TMR6IP
R/W-1
R/W-1
CCP5IP
TMR5IP
R/W-1
R/W-1
 2010 Microchip Technology Inc.
x = Bit is unknown
x = Bit is unknown
TMR5GIP
CCP4IP
R/W-1
R/W-1
TMR1GIP
CCP3IP
R/W-1
R/W-1
bit 0
bit 0

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