PIC18F27J13-I/SP Microchip Technology, PIC18F27J13-I/SP Datasheet - Page 510

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PIC18F27J13-I/SP

Manufacturer Part Number
PIC18F27J13-I/SP
Description
IC PIC MCU 128KB FLASH 28SPDIP
Manufacturer
Microchip Technology
Series
PIC® XLP™ 18Fr

Specifications of PIC18F27J13-I/SP

Core Size
8-Bit
Program Memory Size
128KB (64K x 16)
Core Processor
PIC
Speed
48MHz
Connectivity
I²C, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
22
Program Memory Type
FLASH
Ram Size
3.8K x 8
Voltage - Supply (vcc/vdd)
2.15 V ~ 3.6 V
Data Converters
A/D 10x10b/12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Controller Family/series
PIC18
Cpu Speed
48MHz
Digital Ic Case Style
DIP
Supply Voltage Range
1.8V To 5.5V
Embedded Interface Type
I2C, SPI, USART
Rohs Compliant
Yes
Core
PIC
Processor Series
PIC18F
Data Bus Width
8 bit
Maximum Clock Frequency
48 MHz
Data Ram Size
3.76 KB
On-chip Adc
Yes
Number Of Programmable I/os
2
Number Of Timers
8
Operating Supply Voltage
2.15 V to 3.6 V
Operating Temperature Range
- 40 C to + 85 C
A/d Bit Size
12 bit
A/d Channels Available
10
Height
3.43 mm
Interface Type
I2C, SPI, USART
Length
34.4 mm
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Supply Voltage (max)
3.6 V
Supply Voltage (min)
2.15 V
Width
7.24 mm
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
MA180030 - BOARD DEMO PIC18F47J13 FS USBMA180029 - BOARD DEMO PIC18F47J53 FS USB
Eeprom Size
-
Lead Free Status / Rohs Status
 Details
PIC18F47J13 FAMILY
FIGURE 30-6:
TABLE 30-13: CLKO AND I/O TIMING REQUIREMENTS
DS39974A-page 510
10
11
12
13
14
15
16
17
18
19
20
21
22†
23†
Note 1:
Param
No.
Note:
(Output)
I/O pin
I/O pin
(Input)
OSC1
CLKO
† These parameters are asynchronous events not related to any internal clock edges.
T
T
T
T
T
T
T
T
T
T
T
T
T
T
OS
OS
CK
CK
CK
CK
OS
OS
IO
IO
IO
IO
INP
RBP
Symbol
Measurements are taken in EC mode, where CLKO output is 4 x T
V2
V2
R
F
H2
R
F
L2
H2
H2
H2
H2
Refer to Figure 30-4 for load conditions.
CK
OS
IO
CK
IO
CK
IO
IO
V
H Port In Valid before CLKO 
I
V OSC1  (Q1 cycle) to Port Out Valid
I
H Port Input Valid to OSC1 
H OSC1  to CLKO 
L OSC1  to CLKO 
CLKO Rise Time
CLKO Fall Time
CLKO  to Port Out Valid
Port In Hold after CLKO 
OSC1  (Q2 cycle) to Port Input Invalid
(I/O in hold time)
(I/O in setup time)
Port Output Rise Time
Port Output Fall Time
INTx pin High or Low Time
RB<7:4> Change INTx High or Low
Time
CLKO AND I/O TIMING
Old Value
Q4
Characteristic
10
13
17
14
20, 21
Q1
Preliminary
19
0.25 T
Min
100
T
T
18
CY
0
0
CY
CY
+ 25
Q2
15
New Value
OSC
Typ
75
75
15
15
50
.
0.5 T
 2010 Microchip Technology Inc.
Max
200
200
150
CY
30
30
6
5
11
+ 20
12
Units Conditions
16
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Q3
(Note 1)
(Note 1)
(Note 1)
(Note 1)

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