DSPIC33FJ16GS404-I/ML Microchip Technology, DSPIC33FJ16GS404-I/ML Datasheet - Page 141
![IC DSPIC MCU/DSP 16K 44-QFN](/photos/6/81/68122/150-44-qfn_sml.jpg)
DSPIC33FJ16GS404-I/ML
Manufacturer Part Number
DSPIC33FJ16GS404-I/ML
Description
IC DSPIC MCU/DSP 16K 44-QFN
Manufacturer
Microchip Technology
Series
dsPIC™ 33Fr
Datasheets
1.DSPIC33FJ06GS101-ISO.pdf
(346 pages)
2.DSPIC33FJ06GS101-ISO.pdf
(18 pages)
3.DSPIC33FJ06GS101-ISO.pdf
(16 pages)
Specifications of DSPIC33FJ16GS404-I/ML
Program Memory Type
FLASH
Program Memory Size
16KB (16K x 8)
Package / Case
44-QFN
Core Processor
dsPIC
Core Size
16-Bit
Speed
40 MIPs
Connectivity
I²C, IrDA, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
35
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Product
DSCs
Data Bus Width
16 bit
Processor Series
DSPIC33F
Core
dsPIC
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
35
Data Ram Size
2 KB
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52713-733, 52714-737, 53276-922, EWDSPIC
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
- DSPIC33FJ06GS101-ISO PDF datasheet
- DSPIC33FJ06GS101-ISO PDF datasheet #2
- DSPIC33FJ06GS101-ISO PDF datasheet #3
- Current page: 141 of 346
- Download datasheet (6Mb)
REGISTER 8-1:
© 2009 Microchip Technology Inc.
bit 3
bit 2-1
bit 0
Note 1: Writes to this register require an unlock sequence. Refer to Section 42. “Oscillator (Part IV)” (DS70307)
2: Direct clock switches between any primary oscillator mode with PLL and FRCPLL mode are not permitted.
in the “dsPIC33F Family Reference Manual” (available from the Microchip website) for details.
This applies to clock switches in either direction. In these instances, the application must switch to FRC mode
as a transition clock source between the two PLL modes.
dsPIC33FJ06GS101/X02 and dsPIC33FJ16GSX02/X04
CF: Clock Fail Detect bit (read/clear by application)
1 = FSCM has detected clock failure
0 = FSCM has not detected clock failure
Unimplemented: Read as ‘0’
OSWEN: Oscillator Switch Enable bit
1 = Request oscillator switch to selection specified by NOSC<2:0> bits
0 = Oscillator switch is complete
OSCCON: OSCILLATOR CONTROL REGISTER
Preliminary
(1)
(CONTINUED)
DS70318D-page 139
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