DSPIC33FJ16GS404-I/ML Microchip Technology, DSPIC33FJ16GS404-I/ML Datasheet - Page 214
![IC DSPIC MCU/DSP 16K 44-QFN](/photos/6/81/68122/150-44-qfn_sml.jpg)
DSPIC33FJ16GS404-I/ML
Manufacturer Part Number
DSPIC33FJ16GS404-I/ML
Description
IC DSPIC MCU/DSP 16K 44-QFN
Manufacturer
Microchip Technology
Series
dsPIC™ 33Fr
Datasheets
1.DSPIC33FJ06GS101-ISO.pdf
(346 pages)
2.DSPIC33FJ06GS101-ISO.pdf
(18 pages)
3.DSPIC33FJ06GS101-ISO.pdf
(16 pages)
Specifications of DSPIC33FJ16GS404-I/ML
Program Memory Type
FLASH
Program Memory Size
16KB (16K x 8)
Package / Case
44-QFN
Core Processor
dsPIC
Core Size
16-Bit
Speed
40 MIPs
Connectivity
I²C, IrDA, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
35
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Product
DSCs
Data Bus Width
16 bit
Processor Series
DSPIC33F
Core
dsPIC
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
35
Data Ram Size
2 KB
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52713-733, 52714-737, 53276-922, EWDSPIC
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
- DSPIC33FJ06GS101-ISO PDF datasheet
- DSPIC33FJ06GS101-ISO PDF datasheet #2
- DSPIC33FJ06GS101-ISO PDF datasheet #3
- Current page: 214 of 346
- Download datasheet (6Mb)
dsPIC33FJ06GS101/X02 and dsPIC33FJ16GSX02/X04
REGISTER 15-15: FCLCONx: PWMx FAULT CURRENT-LIMIT CONTROL REGISTER
DS70318D-page 212
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15
bit 14-10
bit 9
bit 8
IFLTMOD
Note 1: These bits should be changed only when PTEN = 0. Changing the clock selection during operation will
R/W-0
R/W-0
2: When Independent Fault mode is enabled (IFLTMOD = 1), and Fault 1 is used for Current-Limit mode
3: When Independent Fault mode is enabled (IFLTMOD = 1) and Fault 1 is used for Fault mode
yield unpredictable results.
(CLSRC<4:0> = b0000), the Fault Control Source Select bits (FLTSRC<4:0>) should be set to an unused
Fault source to prevent Fault 1 from disabling both the PWMxL and PWMxH outputs.
(FLTSRC<4:0> = b0000), the Current-Limit Control Source Select bits (CLSRC<4:0>) should be set to an
unused current-limit source to prevent the current-limit source from disabling both the PWMxH and
PWMxL outputs.
IFLTMOD: Independent Fault Mode Enable bit
1 = Independent Fault mode: Current-limit input maps FLTDAT<1> to PWMxH output and Fault input
0 = Normal Fault mode: Current-limit feature maps CLDAT<1:0> bits to the PWMxH and PWMxL
CLSRC<4:0>: Current-Limit Control Signal Source Select for PWM # Generator bits
00000 = Fault 1
00001 = Fault 2
00010 = Fault 3
00011 = Fault 4
00100 = Fault 5
00101 = Fault 6
00110 = Fault 7
00111 = Fault 8
01000 = Reserved
•
•
•
11111 = Reserved
CLPOL: Current-Limit Polarity for PWM Generator # bit
1 = The selected current-limit source is active-low
0 = The selected current-limit source is active-high
CLMOD: Current-Limit Mode Enable bit for PWM Generator # bit
1 = Current-limit function is enabled
0 = Current-limit function is disabled
R/W-0
R/W-0
outputs. The PWM Fault feature maps FLTDAT<1:0> to the PWMxH and PWMxL outputs.
maps FLTDAT<0> to PWMxL output. The CLDAT<1:0> bits are not used for override functions.
FLTSRC<4:0>
W = Writable bit
‘1’ = Bit is set
R/W-0
R/W-0
(2,3)
CLSRC<4:0>
R/W-0
R/W-0
Preliminary
(2,3)
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
R/W-0
R/W-0
(1)
FLTPOL
R/W-0
R/W-0
(1)
© 2009 Microchip Technology Inc.
x = Bit is unknown
CLPOL
R/W-0
R/W-0
FLTMOD<1:0>
(1)
(2,3)
CLMOD
R/W-0
R/W-0
bit 8
bit 0
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