ATMEGA32A-MU Atmel, ATMEGA32A-MU Datasheet - Page 349
ATMEGA32A-MU
Manufacturer Part Number
ATMEGA32A-MU
Description
MCU AVR 32K FLASH 16MHZ 44-QFN
Manufacturer
Atmel
Series
AVR® ATmegar
Specifications of ATMEGA32A-MU
Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
32
Program Memory Size
32KB (16K x 16)
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
44-VQFN Exposed Pad
Processor Series
ATMEGA32x
Core
AVR8
Data Bus Width
8 bit
Data Ram Size
2 KB
Interface Type
2-Wire, SPI, USART
Maximum Clock Frequency
16 MHz
Number Of Programmable I/os
32
Number Of Timers
3
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWAVR, EWAVR-BL
Development Tools By Supplier
ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 8 Channel
Controller Family/series
AVR MEGA
No. Of I/o's
32
Eeprom Memory Size
1KB
Ram Memory Size
2KB
Cpu Speed
16MHz
Rohs Compliant
Yes
For Use With
ATSTK524 - KIT STARTER ATMEGA32M1/MEGA32C1ATSTK600 - DEV KIT FOR AVR/AVR32ATAVRDRAGON - KIT DRAGON 32KB FLASH MEM AVRATSTK500 - PROGRAMMER AVR STARTER KIT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ATMEGA32A-MU
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
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8155C–AVR–02/11
19 USART ................................................................................................... 147
20 Two-wire Serial Interface ..................................................................... 177
21 Analog Comparator ............................................................................. 206
22 Analog to Digital Converter ................................................................ 209
18.2
18.3
18.4
19.1
19.2
19.3
19.4
19.5
19.6
19.7
19.8
19.9
19.10
19.11
19.12
20.1
20.2
20.3
20.4
20.5
20.6
20.7
20.8
20.9
21.1
21.2
21.3
22.1
22.2
22.3
22.4
Overview ........................................................................................................138
SS Pin Functionality ......................................................................................143
Data Modes ...................................................................................................145
Features ........................................................................................................147
Overview ........................................................................................................147
Clock Generation ...........................................................................................149
Frame Formats ..............................................................................................152
USART Initialization .......................................................................................153
Data Transmission – The USART Transmitter ..............................................154
Data Reception – The USART Receiver .......................................................157
Asynchronous Data Reception ......................................................................161
Multi-processor Communication Mode ..........................................................164
Accessing UBRRH/ UCSRC Registers .........................................................165
Register Description ......................................................................................167
Examples of Baud Rate Setting .....................................................................172
Features ........................................................................................................177
Two-wire Serial Interface Bus Definition ........................................................177
Data Transfer and Frame Format ..................................................................178
Multi-master Bus Systems, Arbitration and Synchronization .........................181
Overview of the TWI Module .........................................................................182
Using the TWI ................................................................................................185
Transmission Modes .....................................................................................187
Multi-master Systems and Arbitration ............................................................201
Register Description ......................................................................................202
Overview ........................................................................................................206
Analog Comparator Multiplexed Input ...........................................................206
Register Description ......................................................................................207
Features ........................................................................................................209
Overview ........................................................................................................209
Operation .......................................................................................................210
Starting a Conversion ....................................................................................211
ATmega32A
iv
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